<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; line-break: after-white-space;" class="">In MPICH, OFI vs. UCX makes no difference for shared memory since that’s a different module. CH4 vs. CH3 is the only choice that matters in that case.<div class=""><br class=""></div><div class="">CH3 vs. CH4 shared memory is pretty close, but it most instances, CH3 is still a little faster. There’s some changes in progress to improve things, but they’re not ready yet.</div><div class=""><br class=""></div><div class=""><div class="">Thanks,</div><div class="">Wesley</div><div><br class=""><blockquote type="cite" class=""><div class="">On Dec 14, 2019, at 6:51 PM, Jeff Hammond via devel <<a href="mailto:devel@mpich.org" class="">devel@mpich.org</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">MPICH configure just asked me to choose ch4:ofi vs ch4:ucx vs ch3. Does anyone have an informed opinion on which one is the faster for shared-memory execution?<div class=""><br class=""></div><div class="">My specific use case is NWChem on very large multi-socket Xeon nodes, where passive target RMA is the primary communication method, hence my primary concern is asynchronous progress and lack of serialization in RMA. In the past, I have observed significant performance issues due to serialization of RMA accumulate operations acting on non-overlapping memory regions.</div><div class=""><br class=""></div><div class="">Jeff<br clear="all" class=""><div class=""><br class=""></div>-- <br class=""><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature">Jeff Hammond<br class=""><a href="mailto:jeff.science@gmail.com" target="_blank" class="">jeff.science@gmail.com</a><br class=""><a href="http://jeffhammond.github.io/" target="_blank" class="">http://jeffhammond.github.io/</a></div></div></div>
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