[mpich-commits] [mpich] MPICH primary repository branch, master, updated. v3.0.4-234-g2bda6bc
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http://git.mpich.org/mpich.git/commitdiff/2bda6bc7ec088821941f9a7a8d7f001db816b99c
commit 2bda6bc7ec088821941f9a7a8d7f001db816b99c
Author: Pavan Balaji <balaji at mcs.anl.gov>
Date: Sun May 19 00:17:55 2013 -0500
Hydra-specific patches for hwloc.
Picked up the relevant parts of [a3bce754], [255da3f6], [90da6e90],
[db276e4e], [d2072896], [aad2bd26].
No reviewer.
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am b/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am
index a76d42e..5d635d5 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am
@@ -9,10 +9,10 @@ ACLOCAL_AMFLAGS = -I ./config
SUBDIRS = src include
if HWLOC_BUILD_STANDALONE
-SUBDIRS += utils tests
+# SUBDIRS += utils tests
# We need doc/ if HWLOC_BUILD_DOXYGEN, or during make install if HWLOC_INSTALL_DOXYGEN.
# There's no INSTALL_SUBDIRS, so always enter doc/ and check HWLOC_BUILD/INSTALL_DOXYGEN there
-SUBDIRS += doc
+# SUBDIRS += doc
endif
# Do not let automake automatically add the non-standalone dirs to the
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh b/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh
index d69ef09..df42802 100755
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh
@@ -1,2 +1,2 @@
:
-autoreconf -ivf
+autoreconf ${autoreconf_args:-"-ivf"}
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4 b/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4
index 02b1e6f..b9ab48f 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4
@@ -441,7 +441,25 @@ EOF])
])
AC_CHECK_DECLS([strtoull], [], [], [AC_INCLUDES_DEFAULT])
- AC_CHECK_FUNCS([sysctl sysctlbyname])
+ # Do a full link test instead of just using AC_CHECK_FUNCS, which
+ # just checks to see if the symbol exists or not. For example,
+ # the prototype of sysctl uses u_int, which on some platforms
+ # (such as FreeBSD) is only defined under __BSD_VISIBLE, __USE_BSD
+ # or other similar definitions. So while the symbols "sysctl" and
+ # "sysctlbyname" might still be available in libc (which autoconf
+ # checks for), they might not be actually usable.
+ AC_TRY_LINK([
+ #include <stdio.h>
+ #include <sys/sysctl.h>
+ ],
+ [return sysctl(NULL,0,NULL,NULL,NULL,0);],
+ AC_DEFINE([HAVE_SYSCTL],[1],[Define to '1' if sysctl is present and usable]))
+ AC_TRY_LINK([
+ #include <stdio.h>
+ #include <sys/sysctl.h>
+ ],
+ [return sysctlbyname(NULL,NULL,NULL,NULL,0);],
+ AC_DEFINE([HAVE_SYSCTLBYNAME],[1],[Define to '1' if sysctlbyname is present and usable]))
case ${target} in
*-*-mingw*|*-*-cygwin*)
@@ -1232,7 +1250,10 @@ dnl number of arguments (10). Success means the compiler couldn't really check.
AC_DEFUN([_HWLOC_CHECK_DECL], [
AC_MSG_CHECKING([whether function $1 is declared])
AC_REQUIRE([AC_PROG_CC])
- AC_COMPILE_IFELSE([AC_LANG_PROGRAM([AC_INCLUDES_DEFAULT([$4])],[$1(1,2,3,4,5,6,7,8,9,10);])],
+ AC_COMPILE_IFELSE([AC_LANG_PROGRAM(
+ [AC_INCLUDES_DEFAULT([$4])
+ $1(int,long,int,long,int,long,int,long,int,long);],
+ [$1(1,2,3,4,5,6,7,8,9,10);])],
[AC_MSG_RESULT([no])
$3],
[AC_MSG_RESULT([yes])
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c
index fd26aa8..54d88f7 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c
@@ -164,7 +164,7 @@ hwloc_freebsd_get_thread_cpubind(hwloc_topology_t topology __hwloc_attribute_unu
#endif
#endif
-#ifdef HAVE_SYSCTL
+#if defined(HAVE_SYSCTL) && defined(HAVE_SYSCTL_H)
static void
hwloc_freebsd_node_meminfo_info(struct hwloc_topology *topology)
{
@@ -187,7 +187,7 @@ hwloc_look_freebsd(struct hwloc_backend *backend)
}
/* Add FreeBSD specific information */
-#ifdef HAVE_SYSCTL
+#if defined(HAVE_SYSCTL) && defined(HAVE_SYSCTL_H)
hwloc_freebsd_node_meminfo_info(topology);
#endif
hwloc_obj_add_info(topology->levels[0][0], "Backend", "FreeBSD");
http://git.mpich.org/mpich.git/commitdiff/8ba28d9596b6fa9249e469bf8b0ca4be0a48792a
commit 8ba28d9596b6fa9249e469bf8b0ca4be0a48792a
Author: Pavan Balaji <balaji at mcs.anl.gov>
Date: Sun May 19 00:12:32 2013 -0500
Upgraded to hwloc-1.7.1rc1.
No reviewer.
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am b/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am
index 5d635d5..a76d42e 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/Makefile.am
@@ -9,10 +9,10 @@ ACLOCAL_AMFLAGS = -I ./config
SUBDIRS = src include
if HWLOC_BUILD_STANDALONE
-# SUBDIRS += utils tests
+SUBDIRS += utils tests
# We need doc/ if HWLOC_BUILD_DOXYGEN, or during make install if HWLOC_INSTALL_DOXYGEN.
# There's no INSTALL_SUBDIRS, so always enter doc/ and check HWLOC_BUILD/INSTALL_DOXYGEN there
-# SUBDIRS += doc
+SUBDIRS += doc
endif
# Do not let automake automatically add the non-standalone dirs to the
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/NEWS b/src/pm/hydra/tools/topo/hwloc/hwloc/NEWS
index acc67c0..bc99c0e 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/NEWS
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/NEWS
@@ -17,6 +17,30 @@ bug fixes (and other actions) for each version of hwloc since version
in v0.9.1).
+Version 1.7.1
+-------------
+* Fix a failed assertion in the distance grouping code when loading a XML
+ file that already contains some groups.
+ Thanks to Laercio Lima Pilla for reporting the problem.
+* Remove unexpected Group objects when loading XML topologies with I/O
+ objects and NUMA distances.
+ Thanks to Elena Elkina for reporting the problem and testing patches.
+* Fix PCI link speed discovery when using libpciaccess.
+* Fix invalid libpciaccess virtual function device/vendor IDs when using
+ SR-IOV PCI devices on Linux.
+* Fix GL component build with old NVCtrl releases.
+ Thanks to Jirka Hladky for reporting the problem.
+* Fix embedding breakage caused by libltdl.
+ Thanks to Pavan Balaji for reporting the problem.
+* Always use the system-wide libltdl instead of shipping one inside hwloc.
+* Document issues when enabling plugins while embedding hwloc in another
+ project, in the documentation section Embedding hwloc in Other Software.
+* Add a FAQ entry "How to get useful topology information on NetBSD?"
+ in the documentation.
+* Somes fixes in the renaming code for embedding.
+* Miscellaneous minor build fixes.
+
+
Version 1.7.0
-------------
* New operating system backends
@@ -73,6 +97,14 @@ Version 1.7.0
names are prefixed with '-'.
+ lstopo --ignore PU now works when displaying the topology in
graphical and textual mode (not when exporting to XML).
+ + Make sure I/O options always appear in lstopo usage, not only when
+ using pciutils/libpci.
+ + Remove some unneeded Linux specific includes from some interoperability
+ headers.
+ + Fix some inconsistencies in hwloc-distrib and hwloc-assembler-remote
+ manpages. Thanks to Guy Streeter for the report.
+ + Fix a memory leak on AIX when getting memory binding.
+ + Fix many small memory leaks on Linux.
+ The `libpci' component is now called `pci' but the old name is still
accepted in the HWLOC_COMPONENTS variable for backward compatibility.
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/VERSION b/src/pm/hydra/tools/topo/hwloc/hwloc/VERSION
index 6028396..5cc8694 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/VERSION
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/VERSION
@@ -7,7 +7,7 @@
major=1
minor=7
-release=0
+release=1
# greek is used for alpha or beta release tags. If it is non-empty,
# it will be appended to the version number. It does not have to be
@@ -16,7 +16,7 @@ release=0
# requirement is that it must be entirely printable ASCII characters
# and have no white space.
-greek=rc2
+greek=rc1
# If want_repo_rev=1, then the SVN r number will be included in the overall
# hwloc version number in some form.
@@ -58,4 +58,4 @@ date="Unreleased developer copy"
# 2. Version numbers are described in the Libtool current:revision:age
# format.
-libhwloc_so_version=8:0:3
+libhwloc_so_version=8:1:3
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh b/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh
index df42802..d69ef09 100755
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/autogen.sh
@@ -1,2 +1,2 @@
:
-autoreconf ${autoreconf_args:-"-ivf"}
+autoreconf -ivf
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4 b/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4
index 3bec360..02b1e6f 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/config/hwloc.m4
@@ -9,7 +9,7 @@ dnl Copyright (c) 2004-2012 The Regents of the University of California.
dnl All rights reserved.
dnl Copyright (c) 2004-2008 High Performance Computing Center Stuttgart,
dnl University of Stuttgart. All rights reserved.
-dnl Copyright © 2006-2011 Cisco Systems, Inc. All rights reserved.
+dnl Copyright © 2006-2013 Cisco Systems, Inc. All rights reserved.
dnl Copyright © 2012 Blue Brain Project, BBP/EPFL. All rights reserved.
dnl Copyright © 2012 Oracle and/or its affiliates. All rights reserved.
dnl See COPYING in top-level directory.
@@ -439,30 +439,9 @@ EOF])
#include <sys/param.h>
#endif
])
+ AC_CHECK_DECLS([strtoull], [], [], [AC_INCLUDES_DEFAULT])
- # Do a full link test instead of just using AC_CHECK_FUNCS, which
- # just checks to see if the symbol exists or not. For example,
- # the prototype of sysctl uses u_int, which on some platforms
- # (such as FreeBSD) is only defined under __BSD_VISIBLE, __USE_BSD
- # or other similar definitions. So while the symbols "sysctl" and
- # "sysctlbyname" might still be available in libc (which autoconf
- # checks for), they might not be actually usable.
- AC_TRY_LINK([
- #include <stdio.h>
- #include <sys/sysctl.h>
- ],
- [return sysctl(NULL,0,NULL,NULL,NULL,0);],
- AC_DEFINE([HAVE_SYSCTL],[1],[Define to '1' if sysctl is present and usable]))
- AC_TRY_LINK([
- #include <stdio.h>
- #include <sys/sysctl.h>
- ],
- [return sysctlbyname(NULL,NULL,NULL,NULL,0);],
- AC_DEFINE([HAVE_SYSCTLBYNAME],[1],[Define to '1' if sysctlbyname is present and usable]))
-
- AC_CHECK_DECLS([strtoull],
- [AC_DEFINE([HWLOC_HAVE_DECL_STRTOULL],[1],[Define to '1' if strtoull declaration is present])],,
- [AC_INCLUDES_DEFAULT])
+ AC_CHECK_FUNCS([sysctl sysctlbyname])
case ${target} in
*-*-mingw*|*-*-cygwin*)
@@ -994,7 +973,7 @@ EOF])
[hwloc_pthread_mutex_happy=yes
HWLOC_LIBS_PRIVATE="$HWLOC_LIBS_PRIVATE -lpthread"
],
- [AC_MSG_CHECKING([fot pthread_mutex_lock with -lpthread])
+ [AC_MSG_CHECKING([for pthread_mutex_lock with -lpthread])
# Try again with explicit -lpthread, but don't use AC_CHECK_FUNC to avoid the cache
tmp_save_LIBS=$LIBS
LIBS="$LIBS -lpthread"
@@ -1021,6 +1000,12 @@ EOF])
AC_MSG_CHECKING([if plugin support is enabled])
# Plugins (even core support) are totally disabled by default
AS_IF([test "x$enable_plugins" = "x"], [enable_plugins=no])
+ AS_IF([test "x$enable_plugins" != "xno"], [hwloc_have_plugins=yes], [hwloc_have_plugins=no])
+ AC_MSG_RESULT([$hwloc_have_plugins])
+ AS_IF([test "x$hwloc_have_plugins" = "xyes"],
+ [AC_DEFINE([HWLOC_HAVE_PLUGINS], 1, [Define to 1 if the hwloc library should support dynamically-loaded plugins])])
+
+ # Some sanity checks about plugins
# libltdl doesn't work on AIX as of 2.4.2
AS_IF([test "x$enable_plugins" = "xyes" -a "x$hwloc_aix" = "xyes"],
[AC_MSG_WARN([libltdl does not work on AIX, plugins support cannot be enabled.])
@@ -1030,10 +1015,18 @@ EOF])
[AC_MSG_WARN([Plugins not supported on non-native Windows build, plugins support cannot be enabled.])
AC_MSG_ERROR([Cannot continue])])
- AS_IF([test "x$enable_plugins" != "xno"], [hwloc_have_plugins=yes], [hwloc_have_plugins=no])
- AC_MSG_RESULT([$hwloc_have_plugins])
- AS_IF([test "x$hwloc_have_plugins" = "xyes"],
- [AC_DEFINE([HWLOC_HAVE_PLUGINS], 1, [Define to 1 if the hwloc library should support dynamically-loaded plugins])])
+ # If we want plugins, look for ltdl.h and libltdl
+ if test "x$hwloc_have_plugins" = xyes; then
+ AC_CHECK_HEADER([ltdl.h], [],
+ [AC_MSG_WARN([Plugin support requested, but could not find ltdl.h])
+ AC_MSG_ERROR([Cannot continue])])
+ AC_CHECK_LIB([ltdl], [lt_dlopenext],
+ [HWLOC_LIBS="$HWLOC_LIBS -lltdl"],
+ [AC_MSG_WARN([Plugin support requested, but could not find libltdl])
+ AC_MSG_ERROR([Cannot continue])])
+ # Add libltdl static-build dependencies to hwloc.pc
+ HWLOC_CHECK_LTDL_DEPS
+ fi
# Static components output file
hwloc_static_components_dir=${HWLOC_top_builddir}/src
@@ -1087,7 +1080,6 @@ EOF])
AC_SUBST(HWLOC_CFLAGS)
HWLOC_CPPFLAGS='-I$(HWLOC_top_builddir)/include -I$(HWLOC_top_srcdir)/include'
AC_SUBST(HWLOC_CPPFLAGS)
- HWLOC_LDFLAGS='-L$(HWLOC_top_builddir)/src'
AC_SUBST(HWLOC_LDFLAGS)
AC_SUBST(HWLOC_LIBS)
AC_SUBST(HWLOC_LIBS_PRIVATE)
@@ -1240,10 +1232,7 @@ dnl number of arguments (10). Success means the compiler couldn't really check.
AC_DEFUN([_HWLOC_CHECK_DECL], [
AC_MSG_CHECKING([whether function $1 is declared])
AC_REQUIRE([AC_PROG_CC])
- AC_COMPILE_IFELSE([AC_LANG_PROGRAM(
- [AC_INCLUDES_DEFAULT([$4])
- $1(int,long,int,long,int,long,int,long,int,long);],
- [$1(1,2,3,4,5,6,7,8,9,10);])],
+ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([AC_INCLUDES_DEFAULT([$4])],[$1(1,2,3,4,5,6,7,8,9,10);])],
[AC_MSG_RESULT([no])
$3],
[AC_MSG_RESULT([yes])
@@ -1263,3 +1252,72 @@ AC_DEFUN([_HWLOC_CHECK_DECLS], [
[Define to 1 if you have the declaration of `$1', and to 0 if you don't])
])
+#-----------------------------------------------------------------------
+
+dnl HWLOC_CHECK_LTDL_DEPS
+dnl
+dnl Add ltdl dependencies to HWLOC_LIBS_PRIVATE
+AC_DEFUN([HWLOC_CHECK_LTDL_DEPS], [
+ # save variables that we'll modify below
+ save_lt_cv_dlopen="$lt_cv_dlopen"
+ save_lt_cv_dlopen_libs="$lt_cv_dlopen_libs"
+ save_lt_cv_dlopen_self="$lt_cv_dlopen_self"
+ ###########################################################
+ # code stolen from LT_SYS_DLOPEN_SELF in libtool.m4
+ case $host_os in
+ beos*)
+ lt_cv_dlopen="load_add_on"
+ lt_cv_dlopen_libs=
+ lt_cv_dlopen_self=yes
+ ;;
+
+ mingw* | pw32* | cegcc*)
+ lt_cv_dlopen="LoadLibrary"
+ lt_cv_dlopen_libs=
+ ;;
+
+ cygwin*)
+ lt_cv_dlopen="dlopen"
+ lt_cv_dlopen_libs=
+ ;;
+
+ darwin*)
+ # if libdl is installed we need to link against it
+ AC_CHECK_LIB([dl], [dlopen],
+ [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"],[
+ lt_cv_dlopen="dyld"
+ lt_cv_dlopen_libs=
+ lt_cv_dlopen_self=yes
+ ])
+ ;;
+
+ *)
+ AC_CHECK_FUNC([shl_load],
+ [lt_cv_dlopen="shl_load"],
+ [AC_CHECK_LIB([dld], [shl_load],
+ [lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-ldld"],
+ [AC_CHECK_FUNC([dlopen],
+ [lt_cv_dlopen="dlopen"],
+ [AC_CHECK_LIB([dl], [dlopen],
+ [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"],
+ [AC_CHECK_LIB([svld], [dlopen],
+ [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld"],
+ [AC_CHECK_LIB([dld], [dld_link],
+ [lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-ldld"])
+ ])
+ ])
+ ])
+ ])
+ ])
+ ;;
+ esac
+ # end of code stolen from LT_SYS_DLOPEN_SELF in libtool.m4
+ ###########################################################
+
+ HWLOC_LIBS_PRIVATE="$HWLOC_LIBS_PRIVATE $lt_cv_dlopen_libs"
+
+ # restore modified variable in case the actual libtool code uses them
+ lt_cv_dlopen="$save_lt_cv_dlopen"
+ lt_cv_dlopen_libs="$save_lt_cv_dlopen_libs"
+ lt_cv_dlopen_self="$save_lt_cv_dlopen_self"
+])
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/configure.ac b/src/pm/hydra/tools/topo/hwloc/hwloc/configure.ac
index db3bd69..77bbd06 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/configure.ac
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/configure.ac
@@ -168,24 +168,8 @@ AM_ENABLE_SHARED
AM_DISABLE_STATIC
AM_PROG_LIBTOOL([dlopen win32-dll])
LT_LANG([C])
-LT_CONFIG_LTDL_DIR([src/libltdl])
-LTDL_INIT([recursive convenience])
-AC_CONFIG_FILES([src/libltdl/Makefile])
-
-# Workarounds for libtool LT_CONFIG_H bug
-#CPPFLAGS="$CPPFLAGS -I$HWLOC_top_builddir"
-AC_CONFIG_COMMANDS_PRE([LT_CONFIG_H=`expr "$LT_CONFIG_H" : '.*/\(.*\)'`])
-
-# Add libltdl static-build dependencies to hwloc.pc
-if test "x$hwloc_have_plugins" = xyes; then
- if test "x$with_included_ltdl" = xno; then
- HWLOC_LIBS_PRIVATE="$HWLOC_LIBS_PRIVATE $LIBLTDL"
- fi
- HWLOC_LIBS_PRIVATE="$HWLOC_LIBS_PRIVATE $lt_cv_dlopen_libs"
-fi
-# Is ltdl included?
-# AM_CONDITIONAL([HWLOC_LTDL_INCLUDED], [test "x$with_included_ltdl" = xyes])
+
# Party on
AC_OUTPUT
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/doc/hwloc.doxy b/src/pm/hydra/tools/topo/hwloc/hwloc/doc/hwloc.doxy
index ad5a185..d6d5c19 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/doc/hwloc.doxy
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/doc/hwloc.doxy
@@ -153,10 +153,10 @@ The hwloc core may also benefit from the following development packages:
<li>hwloc can use one of two different libraries for I/O device
discovery:
<ol>
-<li> libpciaccess (BSD). The relevant development package is usually
+<li>libpciaccess (BSD). The relevant development package is usually
<tt>libpciaccess-devel</tt> or <tt>libpciaccess-dev</tt>. </li>
<li>libpci, from the pciutils package (GPL). The relevant development
-package is usually <tt>pciutils-devel</tt> or <tt>libpci-dev</tt>.
+package is usually <tt>pciutils-devel</tt> or <tt>libpci-dev</tt>. </li>
</ol>
</li>
@@ -175,6 +175,10 @@ package is usually <tt>pciutils-devel</tt> or <tt>libpci-dev</tt>.
The relevant development package is usually <tt>libxml2-devel</tt>
or <tt>libxml2-dev</tt>.
</li>
+<li>libtool's ltdl library for dynamic plugin loading.
+ The relevant development package is usually <tt>libtool-ltdl-devel</tt>
+ or <tt>libltdl-dev</tt>.
+</li>
</ul>
PCI and XML support may be statically built inside the main hwloc
@@ -1876,7 +1880,7 @@ enabled for the current topology.
<dd>
hwloc/glibc-sched.h offers conversion routines between Glibc and
hwloc CPU sets in order to use hwloc with functions such as
- sched_setaffinity().
+ sched_getaffinity() or pthread_attr_setaffinity_np().
</dd>
<dt>OpenFabrics Verbs</dt>
@@ -2139,6 +2143,9 @@ is registered to the hwloc core.
Components are then only enabled if the topology configuration
requests it, as explained in the previous sections.
+Also note that plugins should carefully be enabled and used when
+embedding hwloc in another project, see \ref embed for details.
+
\section plugins_adding Adding new discovery components and plugins
The types and functions cited below are declared in the hwloc/plugins.h header.
@@ -2323,6 +2330,17 @@ you can directly integrate hwloc's m4 configure macro into your
configure script. You can then invoke hwloc's configuration tests and
build setup by calling an m4 macro (see below).
+Although hwloc dynamic shared object plugins may be used in embedded
+mode, the embedder project will have to manually setup libltdl in its
+build system so that hwloc can load its plugins at run time.
+Also, embedders should be aware of complications that can arise due to
+public and private linker namespaces (e.g., if the embedder project is
+loaded into a private namespace and then hwloc tries to dynamically
+load its plugins, such loading may fail since the hwloc plugins can't
+find the hwloc symbols they need).
+The embedder project is <b>strongly</b> advised not to use hwloc's
+dynamically loading plugins / libltdl capability.
+
\section embedding_m4 Using hwloc's M4 Embedding Capabilities
Every project is different, and there are many different ways of
@@ -2749,4 +2767,16 @@ CPPFLAGS may have to be updated if your platform headers are installed
in a different directory.
+\section faq_netbsd_bind How to get useful topology information on NetBSD?
+
+The NetBSD (and FreeBSD) backend uses x86-specific topology discovery
+(through the x86 component).
+This implementation requires CPU binding so as to query topology
+information from each individual logical processor.
+This means that hwloc cannot find any useful topology information
+unless user-level process binding is allowed by the NetBSD kernel.
+The <tt>security.models.extensions.user_set_cpu_affinity</tt>
+sysctl variable must be set to 1 to do so.
+Otherwise, only the number of logical processors will be detected.
+
*/
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/glibc-sched.h b/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/glibc-sched.h
index a5f0346..1b93078 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/glibc-sched.h
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/glibc-sched.h
@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
- * Copyright © 2009-2012 inria. All rights reserved.
+ * Copyright © 2009-2013 inria. All rights reserved.
* Copyright © 2009-2011 Université Bordeaux 1
* Copyright © 2011 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -10,8 +10,8 @@
* \brief Macros to help interaction between hwloc and glibc scheduling routines.
*
* Applications that use both hwloc and glibc scheduling routines such as
- * sched_getaffinity may want to include this file so as to ease conversion
- * between their respective types.
+ * sched_getaffinity() or pthread_attr_setaffinity_np() may want to include
+ * this file so as to ease conversion between their respective types.
*
* \note Topology \p topology must match the current machine.
*/
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/helper.h b/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/helper.h
index bee3a87..8062074 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/helper.h
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/helper.h
@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
- * Copyright © 2009-2012 inria. All rights reserved.
+ * Copyright © 2009-2013 Inria. All rights reserved.
* Copyright © 2009-2012 Université Bordeaux 1
* Copyright © 2009-2010 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -783,16 +783,16 @@ hwloc_get_obj_below_array_by_type (hwloc_topology_t topology, int nr, hwloc_obj_
static __hwloc_inline void
hwloc_distributev(hwloc_topology_t topology, hwloc_obj_t *root, unsigned n_roots, hwloc_cpuset_t *cpuset, unsigned n, unsigned until);
static __hwloc_inline void
-hwloc_distribute(hwloc_topology_t topology, hwloc_obj_t root, hwloc_cpuset_t *cpuset, unsigned n, unsigned until)
+hwloc_distribute(hwloc_topology_t topology, hwloc_obj_t root, hwloc_cpuset_t *set, unsigned n, unsigned until)
{
unsigned i;
if (!root->arity || n == 1 || root->depth >= until) {
/* Got to the bottom, we can't split any more, put everything there. */
for (i=0; i<n; i++)
- cpuset[i] = hwloc_bitmap_dup(root->cpuset);
+ set[i] = hwloc_bitmap_dup(root->cpuset);
return;
}
- hwloc_distributev(topology, root->children, root->arity, cpuset, n, until);
+ hwloc_distributev(topology, root->children, root->arity, set, n, until);
}
/** \brief Distribute \p n items over the topology under \p roots
@@ -803,11 +803,11 @@ hwloc_distribute(hwloc_topology_t topology, hwloc_obj_t root, hwloc_cpuset_t *cp
* \note This function requires the \p roots objects to have a CPU set.
*/
static __hwloc_inline void
-hwloc_distributev(hwloc_topology_t topology, hwloc_obj_t *roots, unsigned n_roots, hwloc_cpuset_t *cpuset, unsigned n, unsigned until)
+hwloc_distributev(hwloc_topology_t topology, hwloc_obj_t *roots, unsigned n_roots, hwloc_cpuset_t *set, unsigned n, unsigned until)
{
unsigned i;
unsigned tot_weight;
- hwloc_cpuset_t *cpusetp = cpuset;
+ hwloc_cpuset_t *cpusetp = set;
tot_weight = 0;
for (i = 0; i < n_roots; i++)
@@ -850,12 +850,12 @@ hwloc_alloc_membind_policy_nodeset(hwloc_topology_t topology, size_t len, hwloc_
* This is similar to hwloc_alloc_membind_policy_nodeset, but for a given cpuset.
*/
static __hwloc_inline void *
-hwloc_alloc_membind_policy(hwloc_topology_t topology, size_t len, hwloc_const_cpuset_t cpuset, hwloc_membind_policy_t policy, int flags)
+hwloc_alloc_membind_policy(hwloc_topology_t topology, size_t len, hwloc_const_cpuset_t set, hwloc_membind_policy_t policy, int flags)
{
- void *p = hwloc_alloc_membind(topology, len, cpuset, policy, flags);
+ void *p = hwloc_alloc_membind(topology, len, set, policy, flags);
if (p)
return p;
- hwloc_set_membind(topology, cpuset, policy, flags);
+ hwloc_set_membind(topology, set, policy, flags);
p = hwloc_alloc(topology, len);
if (p && policy != HWLOC_MEMBIND_FIRSTTOUCH)
/* Enforce the binding by touching the data */
@@ -1029,13 +1029,13 @@ hwloc_topology_get_allowed_nodeset(hwloc_topology_t topology)
* Otherwise \p nodeset will be entirely filled.
*/
static __hwloc_inline void
-hwloc_cpuset_to_nodeset(hwloc_topology_t topology, hwloc_const_cpuset_t cpuset, hwloc_nodeset_t nodeset)
+hwloc_cpuset_to_nodeset(hwloc_topology_t topology, hwloc_const_cpuset_t _cpuset, hwloc_nodeset_t nodeset)
{
int depth = hwloc_get_type_depth(topology, HWLOC_OBJ_NODE);
hwloc_obj_t obj;
if (depth == HWLOC_TYPE_DEPTH_UNKNOWN) {
- if (hwloc_bitmap_iszero(cpuset))
+ if (hwloc_bitmap_iszero(_cpuset))
hwloc_bitmap_zero(nodeset);
else
/* Assume the whole system */
@@ -1045,7 +1045,7 @@ hwloc_cpuset_to_nodeset(hwloc_topology_t topology, hwloc_const_cpuset_t cpuset,
hwloc_bitmap_zero(nodeset);
obj = NULL;
- while ((obj = hwloc_get_next_obj_covering_cpuset_by_depth(topology, cpuset, depth, obj)) != NULL)
+ while ((obj = hwloc_get_next_obj_covering_cpuset_by_depth(topology, _cpuset, depth, obj)) != NULL)
hwloc_bitmap_set(nodeset, obj->os_index);
}
@@ -1057,7 +1057,7 @@ hwloc_cpuset_to_nodeset(hwloc_topology_t topology, hwloc_const_cpuset_t cpuset,
* nodeset.
*/
static __hwloc_inline void
-hwloc_cpuset_to_nodeset_strict(struct hwloc_topology *topology, hwloc_const_cpuset_t cpuset, hwloc_nodeset_t nodeset)
+hwloc_cpuset_to_nodeset_strict(struct hwloc_topology *topology, hwloc_const_cpuset_t _cpuset, hwloc_nodeset_t nodeset)
{
int depth = hwloc_get_type_depth(topology, HWLOC_OBJ_NODE);
hwloc_obj_t obj;
@@ -1065,7 +1065,7 @@ hwloc_cpuset_to_nodeset_strict(struct hwloc_topology *topology, hwloc_const_cpus
return;
hwloc_bitmap_zero(nodeset);
obj = NULL;
- while ((obj = hwloc_get_next_obj_covering_cpuset_by_depth(topology, cpuset, depth, obj)) != NULL)
+ while ((obj = hwloc_get_next_obj_covering_cpuset_by_depth(topology, _cpuset, depth, obj)) != NULL)
hwloc_bitmap_set(nodeset, obj->os_index);
}
@@ -1078,26 +1078,26 @@ hwloc_cpuset_to_nodeset_strict(struct hwloc_topology *topology, hwloc_const_cpus
* This is useful for manipulating memory binding sets.
*/
static __hwloc_inline void
-hwloc_cpuset_from_nodeset(hwloc_topology_t topology, hwloc_cpuset_t cpuset, hwloc_const_nodeset_t nodeset)
+hwloc_cpuset_from_nodeset(hwloc_topology_t topology, hwloc_cpuset_t _cpuset, hwloc_const_nodeset_t nodeset)
{
int depth = hwloc_get_type_depth(topology, HWLOC_OBJ_NODE);
hwloc_obj_t obj;
if (depth == HWLOC_TYPE_DEPTH_UNKNOWN ) {
if (hwloc_bitmap_iszero(nodeset))
- hwloc_bitmap_zero(cpuset);
+ hwloc_bitmap_zero(_cpuset);
else
/* Assume the whole system */
- hwloc_bitmap_fill(cpuset);
+ hwloc_bitmap_fill(_cpuset);
return;
}
- hwloc_bitmap_zero(cpuset);
+ hwloc_bitmap_zero(_cpuset);
obj = NULL;
while ((obj = hwloc_get_next_obj_by_depth(topology, depth, obj)) != NULL) {
if (hwloc_bitmap_isset(nodeset, obj->os_index))
/* no need to check obj->cpuset because objects in levels always have a cpuset */
- hwloc_bitmap_or(cpuset, cpuset, obj->cpuset);
+ hwloc_bitmap_or(_cpuset, _cpuset, obj->cpuset);
}
}
@@ -1109,18 +1109,18 @@ hwloc_cpuset_from_nodeset(hwloc_topology_t topology, hwloc_cpuset_t cpuset, hwlo
* cpuset.
*/
static __hwloc_inline void
-hwloc_cpuset_from_nodeset_strict(struct hwloc_topology *topology, hwloc_cpuset_t cpuset, hwloc_const_nodeset_t nodeset)
+hwloc_cpuset_from_nodeset_strict(struct hwloc_topology *topology, hwloc_cpuset_t _cpuset, hwloc_const_nodeset_t nodeset)
{
int depth = hwloc_get_type_depth(topology, HWLOC_OBJ_NODE);
hwloc_obj_t obj;
if (depth == HWLOC_TYPE_DEPTH_UNKNOWN )
return;
- hwloc_bitmap_zero(cpuset);
+ hwloc_bitmap_zero(_cpuset);
obj = NULL;
while ((obj = hwloc_get_next_obj_by_depth(topology, depth, obj)) != NULL)
if (hwloc_bitmap_isset(nodeset, obj->os_index))
/* no need to check obj->cpuset because objects in levels always have a cpuset */
- hwloc_bitmap_or(cpuset, cpuset, obj->cpuset);
+ hwloc_bitmap_or(_cpuset, _cpuset, obj->cpuset);
}
/** @} */
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/rename.h b/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/rename.h
index e959b0f..ddf5731 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/rename.h
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/include/hwloc/rename.h
@@ -137,10 +137,10 @@ extern "C" {
#define hwloc_topology_export_xml HWLOC_NAME(topology_export_xml)
#define hwloc_topology_export_xmlbuffer HWLOC_NAME(topology_export_xmlbuffer)
#define hwloc_free_xmlbuffer HWLOC_NAME(free_xmlbuffer)
-#define hwloc_topology_set_userdata_export_callback HWLOC_NAME(topology_set_userdata_import_callback)
+#define hwloc_topology_set_userdata_export_callback HWLOC_NAME(topology_set_userdata_export_callback)
#define hwloc_export_obj_userdata HWLOC_NAME(export_obj_userdata)
#define hwloc_export_obj_userdata_base64 HWLOC_NAME(export_obj_userdata_base64)
-#define hwloc_topology_set_userdata_import_callback HWLOC_NAME(topology_set_userdata_export_callback)
+#define hwloc_topology_set_userdata_import_callback HWLOC_NAME(topology_set_userdata_import_callback)
#define hwloc_topology_insert_misc_object_by_cpuset HWLOC_NAME(topology_insert_misc_object_by_cpuset)
#define hwloc_topology_insert_misc_object_by_parent HWLOC_NAME(topology_insert_misc_object_by_parent)
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/include/private/misc.h b/src/pm/hydra/tools/topo/hwloc/hwloc/include/private/misc.h
index e1ce98a..2425691 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/include/private/misc.h
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/include/private/misc.h
@@ -28,10 +28,6 @@
#error "unknown size for unsigned int."
#endif
-#if !defined(HWLOC_HAVE_DECL_STRTOULL)
-unsigned long long int strtoull(const char *nptr, char **endptr, int base);
-#endif /* HWLOC_HAVE_DECL_STRTOULL */
-
/**
* ffsl helpers.
@@ -344,5 +340,8 @@ hwloc_weight_long(unsigned long w)
#endif /* HWLOC_BITS_PER_LONG == 64 */
}
+#if !HAVE_DECL_STRTOULL
+unsigned long long int strtoull(const char *nptr, char **endptr, int base);
+#endif
#endif /* HWLOC_PRIVATE_MISC_H */
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/Makefile.am b/src/pm/hydra/tools/topo/hwloc/hwloc/src/Makefile.am
index 53de278..698a880 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/Makefile.am
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/Makefile.am
@@ -207,10 +207,6 @@ if HWLOC_HAVE_PLUGINS
AM_CPPFLAGS += $(LTDLINCL)
libhwloc_la_LDFLAGS += -export-dynamic
libhwloc_la_LIBADD = $(LIBLTDL)
-libhwloc_la_DEPENDENCIES = $(LTDLDEPS)
-# if HWLOC_LTDL_INCLUDED
-# SUBDIRS = libltdl
-# endif
endif
# Embedded library (note the lack of a .so version number -- that
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/bitmap.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/bitmap.c
index e5cb07e..39f4dbf 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/bitmap.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/bitmap.c
@@ -7,6 +7,8 @@
*/
#include <private/autogen/config.h>
+#include <hwloc/autogen/config.h>
+#include <hwloc.h>
#include <private/misc.h>
#include <private/private.h>
#include <hwloc/bitmap.h>
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/distances.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/distances.c
index 432c746..f4c75e4 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/distances.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/distances.c
@@ -1,5 +1,5 @@
/*
- * Copyright © 2010-2012 Inria. All rights reserved.
+ * Copyright © 2010-2013 Inria. All rights reserved.
* Copyright © 2011-2012 Université Bordeaux 1
* Copyright © 2011 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -522,13 +522,17 @@ hwloc_distances__finalize_logical(struct hwloc_topology *topology,
hwloc_bitmap_asprintf(&a, cpuset);
hwloc_bitmap_asprintf(&b, nodeset);
fprintf(stderr, "****************************************************************************\n");
- fprintf(stderr, "* Hwloc has encountered an error when adding a distance matrix to the topology.\n");
+ fprintf(stderr, "* hwloc has encountered an error when adding a distance matrix to the topology.\n");
fprintf(stderr, "*\n");
fprintf(stderr, "* hwloc_distances__finalize_logical() could not find any object covering\n");
fprintf(stderr, "* cpuset %s and nodeset %s\n", a, b);
fprintf(stderr, "*\n");
fprintf(stderr, "* Please report this error message to the hwloc user's mailing list,\n");
+#ifdef HWLOC_LINUX_SYS
fprintf(stderr, "* along with the output from the hwloc-gather-topology.sh script.\n");
+#else
+ fprintf(stderr, "* along with any relevant topology information from your platform.\n");
+#endif
fprintf(stderr, "****************************************************************************\n");
free(a);
free(b);
@@ -660,7 +664,7 @@ static void hwloc_report_user_distance_error(const char *msg, int line)
if (!reported && !hwloc_hide_errors()) {
fprintf(stderr, "****************************************************************************\n");
- fprintf(stderr, "* Hwloc has encountered what looks like an error from user-given distances.\n");
+ fprintf(stderr, "* hwloc has encountered what looks like an error from user-given distances.\n");
fprintf(stderr, "*\n");
fprintf(stderr, "* %s\n", msg);
fprintf(stderr, "* Error occurred in topology.c line %d\n", line);
@@ -870,9 +874,8 @@ hwloc__groups_by_distances(struct hwloc_topology *topology,
groupsizes[i], group_obj->cpuset);
res_obj = hwloc__insert_object_by_cpuset(topology, group_obj,
fromuser ? hwloc_report_user_distance_error : hwloc_report_os_error);
- assert(res_obj == group_obj); /* somebody else created groups here, things went wrong ?! */
-
- groupobjs[i] = group_obj;
+ /* res_obj may be different from group_objs if we got groups from XML import before grouping */
+ groupobjs[i] = res_obj;
}
/* factorize distances */
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c
index f00f4c1..fd26aa8 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-freebsd.c
@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
- * Copyright © 2009-2012 Inria. All rights reserved.
+ * Copyright © 2009-2013 Inria. All rights reserved.
* Copyright © 2009-2010, 2012 Université Bordeaux 1
* Copyright © 2011 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -29,33 +29,33 @@
#if defined(HAVE_SYS_CPUSET_H) && defined(HAVE_CPUSET_SETAFFINITY)
static void
-hwloc_freebsd_bsd2hwloc(hwloc_bitmap_t hwloc_cpuset, const cpuset_t *cpuset)
+hwloc_freebsd_bsd2hwloc(hwloc_bitmap_t hwloc_cpuset, const cpuset_t *cset)
{
unsigned cpu;
hwloc_bitmap_zero(hwloc_cpuset);
for (cpu = 0; cpu < CPU_SETSIZE; cpu++)
- if (CPU_ISSET(cpu, cpuset))
+ if (CPU_ISSET(cpu, cset))
hwloc_bitmap_set(hwloc_cpuset, cpu);
}
static void
-hwloc_freebsd_hwloc2bsd(hwloc_const_bitmap_t hwloc_cpuset, cpuset_t *cpuset)
+hwloc_freebsd_hwloc2bsd(hwloc_const_bitmap_t hwloc_cpuset, cpuset_t *cset)
{
unsigned cpu;
- CPU_ZERO(cpuset);
+ CPU_ZERO(cset);
for (cpu = 0; cpu < CPU_SETSIZE; cpu++)
if (hwloc_bitmap_isset(hwloc_cpuset, cpu))
- CPU_SET(cpu, cpuset);
+ CPU_SET(cpu, cset);
}
static int
hwloc_freebsd_set_sth_affinity(hwloc_topology_t topology __hwloc_attribute_unused, cpulevel_t level, cpuwhich_t which, id_t id, hwloc_const_bitmap_t hwloc_cpuset, int flags __hwloc_attribute_unused)
{
- cpuset_t cpuset;
+ cpuset_t cset;
- hwloc_freebsd_hwloc2bsd(hwloc_cpuset, &cpuset);
+ hwloc_freebsd_hwloc2bsd(hwloc_cpuset, &cset);
- if (cpuset_setaffinity(level, which, id, sizeof(cpuset), &cpuset))
+ if (cpuset_setaffinity(level, which, id, sizeof(cset), &cset))
return -1;
return 0;
@@ -64,12 +64,12 @@ hwloc_freebsd_set_sth_affinity(hwloc_topology_t topology __hwloc_attribute_unuse
static int
hwloc_freebsd_get_sth_affinity(hwloc_topology_t topology __hwloc_attribute_unused, cpulevel_t level, cpuwhich_t which, id_t id, hwloc_bitmap_t hwloc_cpuset, int flags __hwloc_attribute_unused)
{
- cpuset_t cpuset;
+ cpuset_t cset;
- if (cpuset_getaffinity(level, which, id, sizeof(cpuset), &cpuset))
+ if (cpuset_getaffinity(level, which, id, sizeof(cset), &cset))
return -1;
- hwloc_freebsd_bsd2hwloc(hwloc_cpuset, &cpuset);
+ hwloc_freebsd_bsd2hwloc(hwloc_cpuset, &cset);
return 0;
}
@@ -117,16 +117,16 @@ static int
hwloc_freebsd_set_thread_cpubind(hwloc_topology_t topology __hwloc_attribute_unused, hwloc_thread_t tid, hwloc_const_bitmap_t hwloc_cpuset, int flags __hwloc_attribute_unused)
{
int err;
- cpuset_t cpuset;
+ cpuset_t cset;
if (!pthread_setaffinity_np) {
errno = ENOSYS;
return -1;
}
- hwloc_freebsd_hwloc2bsd(hwloc_cpuset, &cpuset);
+ hwloc_freebsd_hwloc2bsd(hwloc_cpuset, &cset);
- err = pthread_setaffinity_np(tid, sizeof(cpuset), &cpuset);
+ err = pthread_setaffinity_np(tid, sizeof(cset), &cset);
if (err) {
errno = err;
@@ -143,28 +143,28 @@ static int
hwloc_freebsd_get_thread_cpubind(hwloc_topology_t topology __hwloc_attribute_unused, hwloc_thread_t tid, hwloc_bitmap_t hwloc_cpuset, int flags __hwloc_attribute_unused)
{
int err;
- cpuset_t cpuset;
+ cpuset_t cset;
if (!pthread_getaffinity_np) {
errno = ENOSYS;
return -1;
}
- err = pthread_getaffinity_np(tid, sizeof(cpuset), &cpuset);
+ err = pthread_getaffinity_np(tid, sizeof(cset), &cset);
if (err) {
errno = err;
return -1;
}
- hwloc_freebsd_bsd2hwloc(hwloc_cpuset, &cpuset);
+ hwloc_freebsd_bsd2hwloc(hwloc_cpuset, &cset);
return 0;
}
#endif
#endif
#endif
-#if defined(HAVE_SYSCTL) && defined(HAVE_SYSCTL_H)
+#ifdef HAVE_SYSCTL
static void
hwloc_freebsd_node_meminfo_info(struct hwloc_topology *topology)
{
@@ -187,7 +187,7 @@ hwloc_look_freebsd(struct hwloc_backend *backend)
}
/* Add FreeBSD specific information */
-#if defined(HAVE_SYSCTL) && defined(HAVE_SYSCTL_H)
+#ifdef HAVE_SYSCTL
hwloc_freebsd_node_meminfo_info(topology);
#endif
hwloc_obj_add_info(topology->levels[0][0], "Backend", "FreeBSD");
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-gl.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-gl.c
index 0896c78..34cfb39 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-gl.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-gl.c
@@ -85,12 +85,16 @@ hwloc_gl_query_devices(struct hwloc_gl_backend_data_s *data)
gpu_number = ptr_binary_data[1];
free(ptr_binary_data);
+#ifdef NV_CTRL_PCI_DOMAIN
/* Gets the ID's of the GPU defined by gpu_number
* For further details, see the <NVCtrl/NVCtrlLib.h> */
err = XNVCTRLQueryTargetAttribute(display, NV_CTRL_TARGET_TYPE_GPU, gpu_number, 0,
NV_CTRL_PCI_DOMAIN, &nv_ctrl_pci_domain);
if (!err)
continue;
+#else
+ nv_ctrl_pci_domain = 0;
+#endif
err = XNVCTRLQueryTargetAttribute(display, NV_CTRL_TARGET_TYPE_GPU, gpu_number, 0,
NV_CTRL_PCI_BUS, &nv_ctrl_pci_bus);
@@ -103,11 +107,6 @@ hwloc_gl_query_devices(struct hwloc_gl_backend_data_s *data)
continue;
err = XNVCTRLQueryTargetAttribute(display, NV_CTRL_TARGET_TYPE_GPU, gpu_number, 0,
- NV_CTRL_PCI_DOMAIN, &nv_ctrl_pci_domain);
- if (!err)
- continue;
-
- err = XNVCTRLQueryTargetAttribute(display, NV_CTRL_TARGET_TYPE_GPU, gpu_number, 0,
NV_CTRL_PCI_FUNCTION, &nv_ctrl_pci_func);
if (!err)
continue;
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-pci.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-pci.c
index b15375b..f70609e 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-pci.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-pci.c
@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
- * Copyright © 2009-2012 Inria. All rights reserved.
+ * Copyright © 2009-2013 Inria. All rights reserved.
* Copyright © 2009-2011, 2013 Université Bordeaux 1
* See COPYING in top-level directory.
*/
@@ -425,7 +425,7 @@ hwloc_pci_find_cap(const unsigned char *config, size_t config_size, unsigned cap
if (id == 0xff)
break;
- if (ptr + PCI_CAP_LIST_NEXT >= (unsigned char) config_size)
+ if (ptr + (unsigned) PCI_CAP_LIST_NEXT >= config_size)
return 0;
}
return 0;
@@ -571,6 +571,51 @@ hwloc_look_pci(struct hwloc_backend *backend)
#else
offset = hwloc_pci_find_cap(config_space_cache, config_space_cachesize, PCI_CAP_ID_EXP);
#endif /* HWLOC_HAVE_PCI_FIND_CAP */
+
+ if (0xffff == pcidev->vendor_id && 0xffff == pcidev->device_id) {
+ /* SR-IOV puts ffff:ffff in Virtual Function config space.
+ * The actual VF device ID is stored at a special (dynamic) location in the Physical Function config space.
+ * VF and PF have the same vendor ID.
+ *
+ * libpciaccess just returns ffff:ffff, needs to be fixed.
+ * linuxpci is OK because sysfs files are already fixed the kernel.
+ * pciutils is OK when it uses those Linux sysfs files.
+ *
+ * Reading these files is an easy way to work around the libpciaccess issue on Linux,
+ * but we have no way to know if this is caused by SR-IOV or not.
+ *
+ * TODO:
+ * If PF has CAP_ID_PCIX or CAP_ID_EXP (offset>0),
+ * look for extended capability PCI_EXT_CAP_ID_SRIOV,
+ * then read the VF device ID after it (PCI_IOV_DID bytes later).
+ * Needs access to extended config space (needs root on Linux).
+ * TODO:
+ * Add string info attributes in VF and PF objects?
+ */
+#ifdef HWLOC_LINUX_SYS
+ /* Workaround for Linux (the kernel returns the VF device/vendor IDs). */
+ char path[64];
+ char value[16];
+ FILE *file;
+ snprintf(path, sizeof(path), "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/vendor",
+ domain, pcidev->bus, pcidev->dev, pcidev->func);
+ file = fopen(path, "r");
+ if (file) {
+ fread(value, sizeof(value), 1, file);
+ fclose(file);
+ obj->attr->pcidev.vendor_id = strtoul(value, NULL, 16);
+ }
+ snprintf(path, sizeof(path), "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/device",
+ domain, pcidev->bus, pcidev->dev, pcidev->func);
+ file = fopen(path, "r");
+ if (file) {
+ fread(value, sizeof(value), 1, file);
+ fclose(file);
+ obj->attr->pcidev.device_id = strtoul(value, NULL, 16);
+ }
+#endif
+ }
+
if (offset > 0) {
if (offset + PCI_EXP_LNKSTA + 4 >= config_space_cachesize) {
fprintf(stderr, "cannot read PCI_EXP_LNKSTA cap at %d (only %d cached)\n", offset + PCI_EXP_LNKSTA, CONFIG_SPACE_CACHESIZE);
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-x86.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-x86.c
index 3c4ba5d..a0a274b 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-x86.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology-x86.c
@@ -1,5 +1,5 @@
/*
- * Copyright © 2010-2012 Inria. All rights reserved.
+ * Copyright © 2010-2013 Inria. All rights reserved.
* Copyright © 2010-2012 Université Bordeaux 1
* Copyright © 2010-2011 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -796,17 +796,17 @@ int hwloc_look_x86(struct hwloc_topology *topology, unsigned nbprocs, int fulldi
if (hooks.get_thisthread_cpubind && hooks.set_thisthread_cpubind) {
if (!hooks.get_thisthread_cpubind(topology, orig_cpuset, HWLOC_CPUBIND_STRICT)) {
- hwloc_bitmap_t cpuset = hwloc_bitmap_alloc();
+ hwloc_bitmap_t set = hwloc_bitmap_alloc();
for (i = 0; i < nbprocs; i++) {
- hwloc_bitmap_only(cpuset, i);
+ hwloc_bitmap_only(set, i);
hwloc_debug("binding to CPU%d\n", i);
- if (hooks.set_thisthread_cpubind(topology, cpuset, HWLOC_CPUBIND_STRICT)) {
+ if (hooks.set_thisthread_cpubind(topology, set, HWLOC_CPUBIND_STRICT)) {
hwloc_debug("could not bind to CPU%d: %s\n", i, strerror(errno));
continue;
}
look_proc(&infos[i], highest_cpuid, highest_ext_cpuid, features, cpuid_type);
}
- hwloc_bitmap_free(cpuset);
+ hwloc_bitmap_free(set);
hooks.set_thisthread_cpubind(topology, orig_cpuset, 0);
hwloc_bitmap_free(orig_cpuset);
summarize(topology, infos, nbprocs, fulldiscovery);
@@ -816,17 +816,17 @@ int hwloc_look_x86(struct hwloc_topology *topology, unsigned nbprocs, int fulldi
}
if (hooks.get_thisproc_cpubind && hooks.set_thisproc_cpubind) {
if (!hooks.get_thisproc_cpubind(topology, orig_cpuset, HWLOC_CPUBIND_STRICT)) {
- hwloc_bitmap_t cpuset = hwloc_bitmap_alloc();
+ hwloc_bitmap_t set = hwloc_bitmap_alloc();
for (i = 0; i < nbprocs; i++) {
- hwloc_bitmap_only(cpuset, i);
+ hwloc_bitmap_only(set, i);
hwloc_debug("binding to CPU%d\n", i);
- if (hooks.set_thisproc_cpubind(topology, cpuset, HWLOC_CPUBIND_STRICT)) {
+ if (hooks.set_thisproc_cpubind(topology, set, HWLOC_CPUBIND_STRICT)) {
hwloc_debug("could not bind to CPU%d: %s\n", i, strerror(errno));
continue;
}
look_proc(&infos[i], highest_cpuid, highest_ext_cpuid, features, cpuid_type);
}
- hwloc_bitmap_free(cpuset);
+ hwloc_bitmap_free(set);
hooks.set_thisproc_cpubind(topology, orig_cpuset, 0);
hwloc_bitmap_free(orig_cpuset);
summarize(topology, infos, nbprocs, fulldiscovery);
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology.c b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology.c
index 05f65c4..d09627a 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/src/topology.c
@@ -1,6 +1,6 @@
/*
* Copyright © 2009 CNRS
- * Copyright © 2009-2012 Inria. All rights reserved.
+ * Copyright © 2009-2013 Inria. All rights reserved.
* Copyright © 2009-2012 Université Bordeaux 1
* Copyright © 2009-2011 Cisco Systems, Inc. All rights reserved.
* See COPYING in top-level directory.
@@ -72,13 +72,17 @@ void hwloc_report_os_error(const char *msg, int line)
if (!reported && !hwloc_hide_errors()) {
fprintf(stderr, "****************************************************************************\n");
- fprintf(stderr, "* Hwloc has encountered what looks like an error from the operating system.\n");
+ fprintf(stderr, "* hwloc has encountered what looks like an error from the operating system.\n");
fprintf(stderr, "*\n");
fprintf(stderr, "* %s\n", msg);
fprintf(stderr, "* Error occurred in topology.c line %d\n", line);
fprintf(stderr, "*\n");
fprintf(stderr, "* Please report this error message to the hwloc user's mailing list,\n");
+#ifdef HWLOC_LINUX_SYS
fprintf(stderr, "* along with the output from the hwloc-gather-topology.sh script.\n");
+#else
+ fprintf(stderr, "* along with any relevant topology information from your platform.\n");
+#endif
fprintf(stderr, "****************************************************************************\n");
reported = 1;
}
@@ -1529,23 +1533,36 @@ restrict_object_nodeset(hwloc_topology_t topology, hwloc_obj_t *pobj, hwloc_node
static void
merge_useless_child(hwloc_topology_t topology, hwloc_obj_t *pparent)
{
- hwloc_obj_t parent = *pparent, child, *pchild;
+ hwloc_obj_t parent = *pparent, child, *pchild, ios;
int replacechild = 0, replaceparent = 0;
for_each_child_safe(child, parent, pchild)
merge_useless_child(topology, pchild);
child = parent->first_child;
- if (!child || child->next_sibling)
- /* There are no or several children, it's useful to keep them. */
+ if (!child)
+ /* There are no child, nothing to merge. */
+ return;
+
+ if (child->next_sibling && !hwloc_obj_type_is_io(child->next_sibling->type))
+ /* There are several non-I/O children */
return;
+ /* There is one non-I/O child and possible some I/O children.
+ * I/O children shouldn't prevent merging because they can be attached
+ * to anything with the same locality.
+ * Move them to the side during merging, and append them back later.
+ * This is easy because I/O children are always last in the list.
+ */
+ ios = child->next_sibling;
+ child->next_sibling = NULL;
+
/* Check whether parent and/or child can be replaced */
if (topology->ignored_types[parent->type] == HWLOC_IGNORE_TYPE_KEEP_STRUCTURE)
/* Parent can be ignored in favor of the child. */
replaceparent = 1;
if (topology->ignored_types[child->type] == HWLOC_IGNORE_TYPE_KEEP_STRUCTURE)
- /* Child can be ignored in favor of the parent. */
+ /* Child can be ignored in favor of the parent. */
replacechild = 1;
/* Decide which one to actually replace */
@@ -1576,6 +1593,14 @@ merge_useless_child(hwloc_topology_t topology, hwloc_obj_t *pparent)
parent->first_child = child->first_child;
hwloc_free_unlinked_object(child);
}
+
+ if (ios) {
+ /* append I/O children to the list of children of the remaining object */
+ pchild = &((*pparent)->first_child);
+ while (*pchild)
+ pchild = &((*pchild)->next_sibling);
+ *pchild = ios;
+ }
}
static void
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-noio.xml b/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-noio.xml
index c1a6879..974eb1d 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-noio.xml
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-noio.xml
@@ -24,156 +24,154 @@
<info name="OSVersion" value="#1 SMP Debian 3.2.32-1"/>
<info name="HostName" value="conan"/>
<info name="Architecture" value="x86_64"/>
- <object type="Group" cpuset="0xffffffff" complete_cpuset="0xffffffff" online_cpuset="0xffffffff" allowed_cpuset="0xffffffff" nodeset="0x00000003" complete_nodeset="0x00000003" allowed_nodeset="0x00000003" depth="0">
- <distances nbobjs="2" relative_depth="1" latency_base="10.000000">
- <latency value="1.000000"/>
- <latency value="2.000000"/>
- <latency value="2.000000"/>
- <latency value="1.000000"/>
- </distances>
- <object type="NUMANode" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" local_memory="34330173440">
- <page_type size="4096" count="8381390"/>
- <page_type size="2097152" count="0"/>
- <object type="Socket" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <info name="CPUModel" value="Intel(R) Xeon(R) CPU E5-2650 0 @ 2.00GHz"/>
- <info name="CPUType" value="x86_64"/>
- <object type="Cache" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="20971520" depth="3" cache_linesize="64" cache_associativity="20" cache_type="0">
- <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" online_cpuset="0x00000001" allowed_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" online_cpuset="0x00010000" allowed_cpuset="0x00010000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="1" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" online_cpuset="0x00000002" allowed_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" online_cpuset="0x00020000" allowed_cpuset="0x00020000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="2" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" online_cpuset="0x00000004" allowed_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" online_cpuset="0x00040000" allowed_cpuset="0x00040000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="3" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" online_cpuset="0x00000008" allowed_cpuset="0x00000008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="19" cpuset="0x00080000" complete_cpuset="0x00080000" online_cpuset="0x00080000" allowed_cpuset="0x00080000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00100010" complete_cpuset="0x00100010" online_cpuset="0x00100010" allowed_cpuset="0x00100010" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00100010" complete_cpuset="0x00100010" online_cpuset="0x00100010" allowed_cpuset="0x00100010" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="4" cpuset="0x00100010" complete_cpuset="0x00100010" online_cpuset="0x00100010" allowed_cpuset="0x00100010" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="4" cpuset="0x00000010" complete_cpuset="0x00000010" online_cpuset="0x00000010" allowed_cpuset="0x00000010" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="20" cpuset="0x00100000" complete_cpuset="0x00100000" online_cpuset="0x00100000" allowed_cpuset="0x00100000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00200020" complete_cpuset="0x00200020" online_cpuset="0x00200020" allowed_cpuset="0x00200020" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00200020" complete_cpuset="0x00200020" online_cpuset="0x00200020" allowed_cpuset="0x00200020" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="5" cpuset="0x00200020" complete_cpuset="0x00200020" online_cpuset="0x00200020" allowed_cpuset="0x00200020" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="5" cpuset="0x00000020" complete_cpuset="0x00000020" online_cpuset="0x00000020" allowed_cpuset="0x00000020" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="21" cpuset="0x00200000" complete_cpuset="0x00200000" online_cpuset="0x00200000" allowed_cpuset="0x00200000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00400040" complete_cpuset="0x00400040" online_cpuset="0x00400040" allowed_cpuset="0x00400040" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00400040" complete_cpuset="0x00400040" online_cpuset="0x00400040" allowed_cpuset="0x00400040" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="6" cpuset="0x00400040" complete_cpuset="0x00400040" online_cpuset="0x00400040" allowed_cpuset="0x00400040" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="6" cpuset="0x00000040" complete_cpuset="0x00000040" online_cpuset="0x00000040" allowed_cpuset="0x00000040" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="22" cpuset="0x00400000" complete_cpuset="0x00400000" online_cpuset="0x00400000" allowed_cpuset="0x00400000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00800080" complete_cpuset="0x00800080" online_cpuset="0x00800080" allowed_cpuset="0x00800080" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00800080" complete_cpuset="0x00800080" online_cpuset="0x00800080" allowed_cpuset="0x00800080" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="7" cpuset="0x00800080" complete_cpuset="0x00800080" online_cpuset="0x00800080" allowed_cpuset="0x00800080" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="7" cpuset="0x00000080" complete_cpuset="0x00000080" online_cpuset="0x00000080" allowed_cpuset="0x00000080" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="23" cpuset="0x00800000" complete_cpuset="0x00800000" online_cpuset="0x00800000" allowed_cpuset="0x00800000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
+ <distances nbobjs="2" relative_depth="1" latency_base="10.000000">
+ <latency value="1.000000"/>
+ <latency value="2.000000"/>
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- <object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" online_cpuset="0x40000000" allowed_cpuset="0x40000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="7" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
- <object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" online_cpuset="0x00008000" allowed_cpuset="0x00008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- <object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" online_cpuset="0x80000000" allowed_cpuset="0x80000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- </object>
+ </object>
+ <object type="NUMANode" os_index="1" cpuset="0xff00ff00" complete_cpuset="0xff00ff00" online_cpuset="0xff00ff00" allowed_cpuset="0xff00ff00" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" local_memory="34359738368">
+ <page_type size="4096" count="8388608"/>
+ <page_type size="2097152" count="0"/>
+ <object type="Socket" os_index="1" cpuset="0xff00ff00" complete_cpuset="0xff00ff00" online_cpuset="0xff00ff00" allowed_cpuset="0xff00ff00" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <info name="CPUModel" value="Intel(R) Xeon(R) CPU E5-2650 0 @ 2.00GHz"/>
+ <info name="CPUType" value="x86_64"/>
+ <object type="Cache" cpuset="0xff00ff00" complete_cpuset="0xff00ff00" online_cpuset="0xff00ff00" allowed_cpuset="0xff00ff00" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="20971520" depth="3" cache_linesize="64" cache_associativity="20" cache_type="0">
+ <object type="Cache" cpuset="0x01000100" complete_cpuset="0x01000100" online_cpuset="0x01000100" allowed_cpuset="0x01000100" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x01000100" complete_cpuset="0x01000100" online_cpuset="0x01000100" allowed_cpuset="0x01000100" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="0" cpuset="0x01000100" complete_cpuset="0x01000100" online_cpuset="0x01000100" allowed_cpuset="0x01000100" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="8" cpuset="0x00000100" complete_cpuset="0x00000100" online_cpuset="0x00000100" allowed_cpuset="0x00000100" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="24" cpuset="0x01000000" complete_cpuset="0x01000000" online_cpuset="0x01000000" allowed_cpuset="0x01000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x02000200" complete_cpuset="0x02000200" online_cpuset="0x02000200" allowed_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x02000200" complete_cpuset="0x02000200" online_cpuset="0x02000200" allowed_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="1" cpuset="0x02000200" complete_cpuset="0x02000200" online_cpuset="0x02000200" allowed_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="9" cpuset="0x00000200" complete_cpuset="0x00000200" online_cpuset="0x00000200" allowed_cpuset="0x00000200" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="25" cpuset="0x02000000" complete_cpuset="0x02000000" online_cpuset="0x02000000" allowed_cpuset="0x02000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x04000400" complete_cpuset="0x04000400" online_cpuset="0x04000400" allowed_cpuset="0x04000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x04000400" complete_cpuset="0x04000400" online_cpuset="0x04000400" allowed_cpuset="0x04000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="2" cpuset="0x04000400" complete_cpuset="0x04000400" online_cpuset="0x04000400" allowed_cpuset="0x04000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="10" cpuset="0x00000400" complete_cpuset="0x00000400" online_cpuset="0x00000400" allowed_cpuset="0x00000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="26" cpuset="0x04000000" complete_cpuset="0x04000000" online_cpuset="0x04000000" allowed_cpuset="0x04000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x08000800" complete_cpuset="0x08000800" online_cpuset="0x08000800" allowed_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x08000800" complete_cpuset="0x08000800" online_cpuset="0x08000800" allowed_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="3" cpuset="0x08000800" complete_cpuset="0x08000800" online_cpuset="0x08000800" allowed_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="11" cpuset="0x00000800" complete_cpuset="0x00000800" online_cpuset="0x00000800" allowed_cpuset="0x00000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="27" cpuset="0x08000000" complete_cpuset="0x08000000" online_cpuset="0x08000000" allowed_cpuset="0x08000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="4" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="12" cpuset="0x00001000" complete_cpuset="0x00001000" online_cpuset="0x00001000" allowed_cpuset="0x00001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="28" cpuset="0x10000000" complete_cpuset="0x10000000" online_cpuset="0x10000000" allowed_cpuset="0x10000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="5" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" online_cpuset="0x00002000" allowed_cpuset="0x00002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="29" cpuset="0x20000000" complete_cpuset="0x20000000" online_cpuset="0x20000000" allowed_cpuset="0x20000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="6" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" online_cpuset="0x00004000" allowed_cpuset="0x00004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" online_cpuset="0x40000000" allowed_cpuset="0x40000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="7" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" online_cpuset="0x00008000" allowed_cpuset="0x00008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" online_cpuset="0x80000000" allowed_cpuset="0x80000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
</object>
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-normalio.xml b/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-normalio.xml
index a0d2830..a97ec6a 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-normalio.xml
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-normalio.xml
@@ -24,227 +24,225 @@
<info name="OSVersion" value="#1 SMP Debian 3.2.32-1"/>
<info name="HostName" value="conan"/>
<info name="Architecture" value="x86_64"/>
- <object type="Group" cpuset="0xffffffff" complete_cpuset="0xffffffff" online_cpuset="0xffffffff" allowed_cpuset="0xffffffff" nodeset="0x00000003" complete_nodeset="0x00000003" allowed_nodeset="0x00000003" depth="0">
- <distances nbobjs="2" relative_depth="1" latency_base="10.000000">
- <latency value="1.000000"/>
- <latency value="2.000000"/>
- <latency value="2.000000"/>
- <latency value="1.000000"/>
- </distances>
- <object type="NUMANode" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" local_memory="34330173440">
- <page_type size="4096" count="8381390"/>
- <page_type size="2097152" count="0"/>
- <object type="Socket" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <info name="CPUModel" value="Intel(R) Xeon(R) CPU E5-2650 0 @ 2.00GHz"/>
- <info name="CPUType" value="x86_64"/>
- <object type="Cache" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="20971520" depth="3" cache_linesize="64" cache_associativity="20" cache_type="0">
- <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" online_cpuset="0x00000001" allowed_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" online_cpuset="0x00010000" allowed_cpuset="0x00010000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="1" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" online_cpuset="0x00000002" allowed_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" online_cpuset="0x00020000" allowed_cpuset="0x00020000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="2" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" online_cpuset="0x00000004" allowed_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" online_cpuset="0x00040000" allowed_cpuset="0x00040000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
- <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="3" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" online_cpuset="0x00000008" allowed_cpuset="0x00000008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="19" cpuset="0x00080000" complete_cpuset="0x00080000" online_cpuset="0x00080000" allowed_cpuset="0x00080000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
- </object>
- </object>
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+ <object type="PU" os_index="28" cpuset="0x10000000" complete_cpuset="0x10000000" online_cpuset="0x10000000" allowed_cpuset="0x10000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="5" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" online_cpuset="0x00002000" allowed_cpuset="0x00002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="29" cpuset="0x20000000" complete_cpuset="0x20000000" online_cpuset="0x20000000" allowed_cpuset="0x20000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
</object>
- <object type="Bridge" os_index="524320" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 2a" bridge_type="1-1" depth="0" bridge_pci="0000:[83-83]" pci_busid="0000:80:02.0" pci_type="0604 [8086:3c04] [001f:0000] 07" pci_link_speed="0.000000">
+ <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="6" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" online_cpuset="0x00004000" allowed_cpuset="0x00004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" online_cpuset="0x40000000" allowed_cpuset="0x40000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="7" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" online_cpuset="0x00008000" allowed_cpuset="0x00008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" online_cpuset="0x80000000" allowed_cpuset="0x80000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ </object>
+ </object>
+ </object>
+ </object>
+ </object>
+ <object type="Bridge" os_index="2" bridge_type="0-1" depth="0" bridge_pci="0000:[80-84]">
+ <object type="Bridge" os_index="524304" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 1a" bridge_type="1-1" depth="0" bridge_pci="0000:[81-82]" pci_busid="0000:80:01.0" pci_type="0604 [8086:3c02] [0000:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 1a"/>
+ <object type="PCIDev" os_index="528384" name="Intel Corporation I350 Gigabit Network Connection" pci_busid="0000:81:00.0" pci_type="0200 [8086:1521] [00d9:0021] 01" pci_link_speed="0.000000">
<info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 2a"/>
- <object type="PCIDev" os_index="536576" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:83:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
- <info name="PCIVendor" value="NVIDIA Corporation"/>
- <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
+ <info name="PCIDevice" value="I350 Gigabit Network Connection"/>
+ <object type="OSDev" name="eth0" osdev_type="2">
+ <info name="Address" value="00:25:90:95:71:12"/>
</object>
</object>
- <object type="Bridge" os_index="524336" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode" bridge_type="1-1" depth="0" bridge_pci="0000:[84-84]" pci_busid="0000:80:03.0" pci_type="0604 [8086:3c08] [001f:0000] 07" pci_link_speed="0.000000">
+ <object type="PCIDev" os_index="528385" name="Intel Corporation I350 Gigabit Network Connection" pci_busid="0000:81:00.1" pci_type="0200 [8086:1521] [00d9:0021] 01" pci_link_speed="0.000000">
<info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode"/>
- <object type="PCIDev" os_index="540672" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:84:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
- <info name="PCIVendor" value="NVIDIA Corporation"/>
- <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
+ <info name="PCIDevice" value="I350 Gigabit Network Connection"/>
+ <object type="OSDev" name="eth1" osdev_type="2">
+ <info name="Address" value="00:25:90:95:71:13"/>
</object>
</object>
</object>
+ <object type="Bridge" os_index="524320" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 2a" bridge_type="1-1" depth="0" bridge_pci="0000:[83-83]" pci_busid="0000:80:02.0" pci_type="0604 [8086:3c04] [001f:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 2a"/>
+ <object type="PCIDev" os_index="536576" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:83:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="NVIDIA Corporation"/>
+ <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
+ </object>
+ </object>
+ <object type="Bridge" os_index="524336" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode" bridge_type="1-1" depth="0" bridge_pci="0000:[84-84]" pci_busid="0000:80:03.0" pci_type="0604 [8086:3c08] [001f:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode"/>
+ <object type="PCIDev" os_index="540672" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:84:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="NVIDIA Corporation"/>
+ <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
+ </object>
+ </object>
</object>
</object>
</object>
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-wholeio.xml b/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-wholeio.xml
index 3e5b154..119cb78 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-wholeio.xml
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/tests/xml/32em64t-2n8c2t-pci-wholeio.xml
@@ -24,371 +24,369 @@
<info name="OSVersion" value="#1 SMP Debian 3.2.32-1"/>
<info name="HostName" value="conan"/>
<info name="Architecture" value="x86_64"/>
- <object type="Group" cpuset="0xffffffff" complete_cpuset="0xffffffff" online_cpuset="0xffffffff" allowed_cpuset="0xffffffff" nodeset="0x00000003" complete_nodeset="0x00000003" allowed_nodeset="0x00000003" depth="0">
- <distances nbobjs="2" relative_depth="1" latency_base="10.000000">
- <latency value="1.000000"/>
- <latency value="2.000000"/>
- <latency value="2.000000"/>
- <latency value="1.000000"/>
- </distances>
- <object type="NUMANode" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" local_memory="34330173440">
- <page_type size="4096" count="8381390"/>
- <page_type size="2097152" count="0"/>
- <object type="Socket" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <info name="CPUModel" value="Intel(R) Xeon(R) CPU E5-2650 0 @ 2.00GHz"/>
- <info name="CPUType" value="x86_64"/>
- <object type="Cache" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="20971520" depth="3" cache_linesize="64" cache_associativity="20" cache_type="0">
- <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" online_cpuset="0x00000001" allowed_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" online_cpuset="0x00010000" allowed_cpuset="0x00010000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
+ <distances nbobjs="2" relative_depth="1" latency_base="10.000000">
+ <latency value="1.000000"/>
+ <latency value="2.000000"/>
+ <latency value="2.000000"/>
+ <latency value="1.000000"/>
+ </distances>
+ <object type="NUMANode" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" local_memory="34330173440">
+ <page_type size="4096" count="8381390"/>
+ <page_type size="2097152" count="0"/>
+ <object type="Socket" os_index="0" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
+ <info name="CPUModel" value="Intel(R) Xeon(R) CPU E5-2650 0 @ 2.00GHz"/>
+ <info name="CPUType" value="x86_64"/>
+ <object type="Cache" cpuset="0x00ff00ff" complete_cpuset="0x00ff00ff" online_cpuset="0x00ff00ff" allowed_cpuset="0x00ff00ff" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="20971520" depth="3" cache_linesize="64" cache_associativity="20" cache_type="0">
+ <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" online_cpuset="0x00010001" allowed_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
+ <object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" online_cpuset="0x00000001" allowed_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
+ <object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" online_cpuset="0x00010000" allowed_cpuset="0x00010000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
</object>
</object>
- <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="1" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" online_cpuset="0x00000002" allowed_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" online_cpuset="0x00020000" allowed_cpuset="0x00020000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
+ </object>
+ <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="1" cpuset="0x00020002" complete_cpuset="0x00020002" online_cpuset="0x00020002" allowed_cpuset="0x00020002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
+ <object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" online_cpuset="0x00000002" allowed_cpuset="0x00000002" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
+ <object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" online_cpuset="0x00020000" allowed_cpuset="0x00020000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
</object>
</object>
- <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="2" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" online_cpuset="0x00000004" allowed_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" online_cpuset="0x00040000" allowed_cpuset="0x00040000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
+ </object>
+ <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="2" cpuset="0x00040004" complete_cpuset="0x00040004" online_cpuset="0x00040004" allowed_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
+ <object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" online_cpuset="0x00000004" allowed_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
+ <object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" online_cpuset="0x00040000" allowed_cpuset="0x00040000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
</object>
</object>
- <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="3" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001">
- <object type="PU" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" online_cpuset="0x00000008" allowed_cpuset="0x00000008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- <object type="PU" os_index="19" cpuset="0x00080000" complete_cpuset="0x00080000" online_cpuset="0x00080000" allowed_cpuset="0x00080000" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001"/>
- </object>
+ </object>
+ <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x00080008" complete_cpuset="0x00080008" online_cpuset="0x00080008" allowed_cpuset="0x00080008" nodeset="0x00000001" complete_nodeset="0x00000001" allowed_nodeset="0x00000001" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
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- <object type="PCIDev" os_index="498" name="Intel Corporation C600/X79 series chipset 6-Port SATA AHCI Controller" pci_busid="0000:00:1f.2" pci_type="0106 [8086:1d02] [00d9:0062] 06" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="C600/X79 series chipset 6-Port SATA AHCI Controller"/>
- <object type="OSDev" name="sda" osdev_type="0"/>
+ </object>
+ <object type="Bridge" os_index="0" bridge_type="0-1" depth="0" bridge_pci="0000:[00-05]">
+ <object type="PCIDev" os_index="0" name="Intel Corporation Xeon E5/Core i7 DMI2" pci_busid="0000:00:00.0" pci_type="0600 [8086:3c00] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMI2"/>
+ </object>
+ <object type="Bridge" os_index="16" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 1a" bridge_type="1-1" depth="0" bridge_pci="0000:[01-01]" pci_busid="0000:00:01.0" pci_type="0604 [8086:3c02] [0000:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 1a"/>
+ </object>
+ <object type="Bridge" os_index="32" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 2a" bridge_type="1-1" depth="0" bridge_pci="0000:[02-02]" pci_busid="0000:00:02.0" pci_type="0604 [8086:3c04] [0000:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 2a"/>
+ </object>
+ <object type="Bridge" os_index="48" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode" bridge_type="1-1" depth="0" bridge_pci="0000:[03-03]" pci_busid="0000:00:03.0" pci_type="0604 [8086:3c08] [000f:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode"/>
+ <object type="PCIDev" os_index="12288" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:03:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="NVIDIA Corporation"/>
+ <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
</object>
- <object type="PCIDev" os_index="499" name="Intel Corporation C600/X79 series chipset SMBus Host Controller" pci_busid="0000:00:1f.3" pci_type="0c05 [8086:1d22] [00d9:0062] 06" pci_link_speed="0.000000">
+ </object>
+ <object type="PCIDev" os_index="64" name="Intel Corporation Xeon E5/Core i7 DMA Channel 0" pci_busid="0000:00:04.0" pci_type="0880 [8086:3c20] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 0"/>
+ <object type="OSDev" name="dma0chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="65" name="Intel Corporation Xeon E5/Core i7 DMA Channel 1" pci_busid="0000:00:04.1" pci_type="0880 [8086:3c21] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 1"/>
+ <object type="OSDev" name="dma1chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="66" name="Intel Corporation Xeon E5/Core i7 DMA Channel 2" pci_busid="0000:00:04.2" pci_type="0880 [8086:3c22] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 2"/>
+ <object type="OSDev" name="dma2chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="67" name="Intel Corporation Xeon E5/Core i7 DMA Channel 3" pci_busid="0000:00:04.3" pci_type="0880 [8086:3c23] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 3"/>
+ <object type="OSDev" name="dma3chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="68" name="Intel Corporation Xeon E5/Core i7 DMA Channel 4" pci_busid="0000:00:04.4" pci_type="0880 [8086:3c24] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 4"/>
+ <object type="OSDev" name="dma4chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="69" name="Intel Corporation Xeon E5/Core i7 DMA Channel 5" pci_busid="0000:00:04.5" pci_type="0880 [8086:3c25] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 5"/>
+ <object type="OSDev" name="dma5chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="70" name="Intel Corporation Xeon E5/Core i7 DMA Channel 6" pci_busid="0000:00:04.6" pci_type="0880 [8086:3c26] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 6"/>
+ <object type="OSDev" name="dma6chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="71" name="Intel Corporation Xeon E5/Core i7 DMA Channel 7" pci_busid="0000:00:04.7" pci_type="0880 [8086:3c27] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 7"/>
+ <object type="OSDev" name="dma7chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="80" name="Intel Corporation Xeon E5/Core i7 Address Map, VTd_Misc, System Management" pci_busid="0000:00:05.0" pci_type="0880 [8086:3c28] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 Address Map, VTd_Misc, System Management"/>
+ </object>
+ <object type="PCIDev" os_index="82" name="Intel Corporation Xeon E5/Core i7 Control Status and Global Errors" pci_busid="0000:00:05.2" pci_type="0880 [8086:3c2a] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 Control Status and Global Errors"/>
+ </object>
+ <object type="PCIDev" os_index="84" name="Intel Corporation Xeon E5/Core i7 I/O APIC" pci_busid="0000:00:05.4" pci_type="0800 [8086:3c2c] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 I/O APIC"/>
+ </object>
+ <object type="Bridge" os_index="272" name="Intel Corporation C600/X79 series chipset PCI Express Virtual Root Port" bridge_type="1-1" depth="0" bridge_pci="0000:[04-04]" pci_busid="0000:00:11.0" pci_type="0604 [8086:1d3e] [000f:0000] 06" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset PCI Express Virtual Root Port"/>
+ <object type="PCIDev" os_index="16384" name="Intel Corporation C602 chipset 4-Port SATA Storage Control Unit" pci_busid="0000:04:00.0" pci_type="0107 [8086:1d6b] [00d9:0062] 06" pci_link_speed="0.000000">
<info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="C600/X79 series chipset SMBus Host Controller"/>
+ <info name="PCIDevice" value="C602 chipset 4-Port SATA Storage Control Unit"/>
</object>
- <object type="PCIDev" os_index="502" name="Intel Corporation C600/X79 series chipset Thermal Management Controller" pci_busid="0000:00:1f.6" pci_type="1180 [8086:1d24] [00d9:0062] 06" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="C600/X79 series chipset Thermal Management Controller"/>
+ </object>
+ <object type="PCIDev" os_index="352" name="Intel Corporation C600/X79 series chipset MEI Controller #1" pci_busid="0000:00:16.0" pci_type="0780 [8086:1d3a] [00d9:0062] 05" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset MEI Controller #1"/>
+ </object>
+ <object type="PCIDev" os_index="353" name="Intel Corporation C600/X79 series chipset MEI Controller #2" pci_busid="0000:00:16.1" pci_type="0780 [8086:1d3b] [00d9:0062] 05" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset MEI Controller #2"/>
+ </object>
+ <object type="PCIDev" os_index="416" name="Intel Corporation C600/X79 series chipset USB2 Enhanced Host Controller #2" pci_busid="0000:00:1a.0" pci_type="0c03 [8086:1d2d] [00d9:0062] 06" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset USB2 Enhanced Host Controller #2"/>
+ </object>
+ <object type="PCIDev" os_index="464" name="Intel Corporation C600/X79 series chipset USB2 Enhanced Host Controller #1" pci_busid="0000:00:1d.0" pci_type="0c03 [8086:1d26] [00d9:0062] 06" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset USB2 Enhanced Host Controller #1"/>
+ </object>
+ <object type="Bridge" os_index="480" name="Intel Corporation 82801 PCI Bridge" bridge_type="1-1" depth="0" bridge_pci="0000:[05-05]" pci_busid="0000:00:1e.0" pci_type="0604 [8086:244e] [0000:0000] a6" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="82801 PCI Bridge"/>
+ <object type="PCIDev" os_index="20528" name="Matrox Electronics Systems Ltd. MGA G200eW WPCM450" pci_busid="0000:05:03.0" pci_type="0300 [102b:0532] [00d9:0062] 0a" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Matrox Electronics Systems Ltd."/>
+ <info name="PCIDevice" value="MGA G200eW WPCM450"/>
</object>
</object>
+ <object type="PCIDev" os_index="496" name="Intel Corporation C600/X79 series chipset LPC Controller" pci_busid="0000:00:1f.0" pci_type="0601 [8086:1d41] [00d9:0062] 06" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset LPC Controller"/>
+ </object>
+ <object type="PCIDev" os_index="498" name="Intel Corporation C600/X79 series chipset 6-Port SATA AHCI Controller" pci_busid="0000:00:1f.2" pci_type="0106 [8086:1d02] [00d9:0062] 06" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset 6-Port SATA AHCI Controller"/>
+ <object type="OSDev" name="sda" osdev_type="0"/>
+ </object>
+ <object type="PCIDev" os_index="499" name="Intel Corporation C600/X79 series chipset SMBus Host Controller" pci_busid="0000:00:1f.3" pci_type="0c05 [8086:1d22] [00d9:0062] 06" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset SMBus Host Controller"/>
+ </object>
+ <object type="PCIDev" os_index="502" name="Intel Corporation C600/X79 series chipset Thermal Management Controller" pci_busid="0000:00:1f.6" pci_type="1180 [8086:1d24] [00d9:0062] 06" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="C600/X79 series chipset Thermal Management Controller"/>
+ </object>
</object>
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+ <object type="Core" os_index="1" cpuset="0x02000200" complete_cpuset="0x02000200" online_cpuset="0x02000200" allowed_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="9" cpuset="0x00000200" complete_cpuset="0x00000200" online_cpuset="0x00000200" allowed_cpuset="0x00000200" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="25" cpuset="0x02000000" complete_cpuset="0x02000000" online_cpuset="0x02000000" allowed_cpuset="0x02000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
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- <object type="Cache" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="4" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
- <object type="PU" os_index="12" cpuset="0x00001000" complete_cpuset="0x00001000" online_cpuset="0x00001000" allowed_cpuset="0x00001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- <object type="PU" os_index="28" cpuset="0x10000000" complete_cpuset="0x10000000" online_cpuset="0x10000000" allowed_cpuset="0x10000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- </object>
+ </object>
+ <object type="Cache" cpuset="0x04000400" complete_cpuset="0x04000400" online_cpuset="0x04000400" allowed_cpuset="0x04000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x04000400" complete_cpuset="0x04000400" online_cpuset="0x04000400" allowed_cpuset="0x04000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="2" cpuset="0x04000400" complete_cpuset="0x04000400" online_cpuset="0x04000400" allowed_cpuset="0x04000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="10" cpuset="0x00000400" complete_cpuset="0x00000400" online_cpuset="0x00000400" allowed_cpuset="0x00000400" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="26" cpuset="0x04000000" complete_cpuset="0x04000000" online_cpuset="0x04000000" allowed_cpuset="0x04000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
- <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="5" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
- <object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" online_cpuset="0x00002000" allowed_cpuset="0x00002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- <object type="PU" os_index="29" cpuset="0x20000000" complete_cpuset="0x20000000" online_cpuset="0x20000000" allowed_cpuset="0x20000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- </object>
+ </object>
+ <object type="Cache" cpuset="0x08000800" complete_cpuset="0x08000800" online_cpuset="0x08000800" allowed_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x08000800" complete_cpuset="0x08000800" online_cpuset="0x08000800" allowed_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="3" cpuset="0x08000800" complete_cpuset="0x08000800" online_cpuset="0x08000800" allowed_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="11" cpuset="0x00000800" complete_cpuset="0x00000800" online_cpuset="0x00000800" allowed_cpuset="0x00000800" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="27" cpuset="0x08000000" complete_cpuset="0x08000000" online_cpuset="0x08000000" allowed_cpuset="0x08000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
- <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="6" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
- <object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" online_cpuset="0x00004000" allowed_cpuset="0x00004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- <object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" online_cpuset="0x40000000" allowed_cpuset="0x40000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- </object>
+ </object>
+ <object type="Cache" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="4" cpuset="0x10001000" complete_cpuset="0x10001000" online_cpuset="0x10001000" allowed_cpuset="0x10001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="12" cpuset="0x00001000" complete_cpuset="0x00001000" online_cpuset="0x00001000" allowed_cpuset="0x00001000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="28" cpuset="0x10000000" complete_cpuset="0x10000000" online_cpuset="0x10000000" allowed_cpuset="0x10000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
- <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
- <object type="Core" os_index="7" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
- <object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" online_cpuset="0x00008000" allowed_cpuset="0x00008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- <object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" online_cpuset="0x80000000" allowed_cpuset="0x80000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
- </object>
+ </object>
+ <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="5" cpuset="0x20002000" complete_cpuset="0x20002000" online_cpuset="0x20002000" allowed_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" online_cpuset="0x00002000" allowed_cpuset="0x00002000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="29" cpuset="0x20000000" complete_cpuset="0x20000000" online_cpuset="0x20000000" allowed_cpuset="0x20000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
</object>
- </object>
- <object type="Bridge" os_index="2" bridge_type="0-1" depth="0" bridge_pci="0000:[80-84]">
- <object type="Bridge" os_index="524304" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 1a" bridge_type="1-1" depth="0" bridge_pci="0000:[81-82]" pci_busid="0000:80:01.0" pci_type="0604 [8086:3c02] [0000:0000] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 1a"/>
- <object type="PCIDev" os_index="528384" name="Intel Corporation I350 Gigabit Network Connection" pci_busid="0000:81:00.0" pci_type="0200 [8086:1521] [00d9:0021] 01" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="I350 Gigabit Network Connection"/>
- <object type="OSDev" name="eth0" osdev_type="2">
- <info name="Address" value="00:25:90:95:71:12"/>
+ <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="6" cpuset="0x40004000" complete_cpuset="0x40004000" online_cpuset="0x40004000" allowed_cpuset="0x40004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" online_cpuset="0x00004000" allowed_cpuset="0x00004000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" online_cpuset="0x40000000" allowed_cpuset="0x40000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
- <object type="PCIDev" os_index="528385" name="Intel Corporation I350 Gigabit Network Connection" pci_busid="0000:81:00.1" pci_type="0200 [8086:1521] [00d9:0021] 01" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="I350 Gigabit Network Connection"/>
- <object type="OSDev" name="eth1" osdev_type="2">
- <info name="Address" value="00:25:90:95:71:13"/>
+ </object>
+ <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Cache" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="0">
+ <object type="Core" os_index="7" cpuset="0x80008000" complete_cpuset="0x80008000" online_cpuset="0x80008000" allowed_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002">
+ <object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" online_cpuset="0x00008000" allowed_cpuset="0x00008000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
+ <object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" online_cpuset="0x80000000" allowed_cpuset="0x80000000" nodeset="0x00000002" complete_nodeset="0x00000002" allowed_nodeset="0x00000002"/>
</object>
</object>
</object>
- <object type="Bridge" os_index="524320" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 2a" bridge_type="1-1" depth="0" bridge_pci="0000:[83-83]" pci_busid="0000:80:02.0" pci_type="0604 [8086:3c04] [001f:0000] 07" pci_link_speed="0.000000">
+ </object>
+ </object>
+ <object type="Bridge" os_index="2" bridge_type="0-1" depth="0" bridge_pci="0000:[80-84]">
+ <object type="Bridge" os_index="524304" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 1a" bridge_type="1-1" depth="0" bridge_pci="0000:[81-82]" pci_busid="0000:80:01.0" pci_type="0604 [8086:3c02] [0000:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 1a"/>
+ <object type="PCIDev" os_index="528384" name="Intel Corporation I350 Gigabit Network Connection" pci_busid="0000:81:00.0" pci_type="0200 [8086:1521] [00d9:0021] 01" pci_link_speed="0.000000">
<info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 2a"/>
- <object type="PCIDev" os_index="536576" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:83:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
- <info name="PCIVendor" value="NVIDIA Corporation"/>
- <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
+ <info name="PCIDevice" value="I350 Gigabit Network Connection"/>
+ <object type="OSDev" name="eth0" osdev_type="2">
+ <info name="Address" value="00:25:90:95:71:12"/>
</object>
</object>
- <object type="Bridge" os_index="524336" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode" bridge_type="1-1" depth="0" bridge_pci="0000:[84-84]" pci_busid="0000:80:03.0" pci_type="0604 [8086:3c08] [001f:0000] 07" pci_link_speed="0.000000">
+ <object type="PCIDev" os_index="528385" name="Intel Corporation I350 Gigabit Network Connection" pci_busid="0000:81:00.1" pci_type="0200 [8086:1521] [00d9:0021] 01" pci_link_speed="0.000000">
<info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode"/>
- <object type="PCIDev" os_index="540672" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:84:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
- <info name="PCIVendor" value="NVIDIA Corporation"/>
- <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
+ <info name="PCIDevice" value="I350 Gigabit Network Connection"/>
+ <object type="OSDev" name="eth1" osdev_type="2">
+ <info name="Address" value="00:25:90:95:71:13"/>
</object>
</object>
- <object type="PCIDev" os_index="524352" name="Intel Corporation Xeon E5/Core i7 DMA Channel 0" pci_busid="0000:80:04.0" pci_type="0880 [8086:3c20] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 0"/>
- <object type="OSDev" name="dma8chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524353" name="Intel Corporation Xeon E5/Core i7 DMA Channel 1" pci_busid="0000:80:04.1" pci_type="0880 [8086:3c21] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 1"/>
- <object type="OSDev" name="dma9chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524354" name="Intel Corporation Xeon E5/Core i7 DMA Channel 2" pci_busid="0000:80:04.2" pci_type="0880 [8086:3c22] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 2"/>
- <object type="OSDev" name="dma10chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524355" name="Intel Corporation Xeon E5/Core i7 DMA Channel 3" pci_busid="0000:80:04.3" pci_type="0880 [8086:3c23] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 3"/>
- <object type="OSDev" name="dma11chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524356" name="Intel Corporation Xeon E5/Core i7 DMA Channel 4" pci_busid="0000:80:04.4" pci_type="0880 [8086:3c24] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 4"/>
- <object type="OSDev" name="dma12chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524357" name="Intel Corporation Xeon E5/Core i7 DMA Channel 5" pci_busid="0000:80:04.5" pci_type="0880 [8086:3c25] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 5"/>
- <object type="OSDev" name="dma13chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524358" name="Intel Corporation Xeon E5/Core i7 DMA Channel 6" pci_busid="0000:80:04.6" pci_type="0880 [8086:3c26] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 6"/>
- <object type="OSDev" name="dma14chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524359" name="Intel Corporation Xeon E5/Core i7 DMA Channel 7" pci_busid="0000:80:04.7" pci_type="0880 [8086:3c27] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 7"/>
- <object type="OSDev" name="dma15chan0" osdev_type="4"/>
- </object>
- <object type="PCIDev" os_index="524368" name="Intel Corporation Xeon E5/Core i7 Address Map, VTd_Misc, System Management" pci_busid="0000:80:05.0" pci_type="0880 [8086:3c28] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 Address Map, VTd_Misc, System Management"/>
- </object>
- <object type="PCIDev" os_index="524370" name="Intel Corporation Xeon E5/Core i7 Control Status and Global Errors" pci_busid="0000:80:05.2" pci_type="0880 [8086:3c2a] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 Control Status and Global Errors"/>
+ </object>
+ <object type="Bridge" os_index="524320" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 2a" bridge_type="1-1" depth="0" bridge_pci="0000:[83-83]" pci_busid="0000:80:02.0" pci_type="0604 [8086:3c04] [001f:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 2a"/>
+ <object type="PCIDev" os_index="536576" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:83:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="NVIDIA Corporation"/>
+ <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
</object>
- <object type="PCIDev" os_index="524372" name="Intel Corporation Xeon E5/Core i7 I/O APIC" pci_busid="0000:80:05.4" pci_type="0800 [8086:3c2c] [00d9:0062] 07" pci_link_speed="0.000000">
- <info name="PCIVendor" value="Intel Corporation"/>
- <info name="PCIDevice" value="Xeon E5/Core i7 I/O APIC"/>
+ </object>
+ <object type="Bridge" os_index="524336" name="Intel Corporation Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode" bridge_type="1-1" depth="0" bridge_pci="0000:[84-84]" pci_busid="0000:80:03.0" pci_type="0604 [8086:3c08] [001f:0000] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 IIO PCI Express Root Port 3a in PCI Express Mode"/>
+ <object type="PCIDev" os_index="540672" name="NVIDIA Corporation Tesla M2075 Dual-Slot Computing Processor Module" pci_busid="0000:84:00.0" pci_type="0302 [10de:1094] [00de:0088] a1" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="NVIDIA Corporation"/>
+ <info name="PCIDevice" value="Tesla M2075 Dual-Slot Computing Processor Module"/>
</object>
</object>
+ <object type="PCIDev" os_index="524352" name="Intel Corporation Xeon E5/Core i7 DMA Channel 0" pci_busid="0000:80:04.0" pci_type="0880 [8086:3c20] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 0"/>
+ <object type="OSDev" name="dma8chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524353" name="Intel Corporation Xeon E5/Core i7 DMA Channel 1" pci_busid="0000:80:04.1" pci_type="0880 [8086:3c21] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 1"/>
+ <object type="OSDev" name="dma9chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524354" name="Intel Corporation Xeon E5/Core i7 DMA Channel 2" pci_busid="0000:80:04.2" pci_type="0880 [8086:3c22] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 2"/>
+ <object type="OSDev" name="dma10chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524355" name="Intel Corporation Xeon E5/Core i7 DMA Channel 3" pci_busid="0000:80:04.3" pci_type="0880 [8086:3c23] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 3"/>
+ <object type="OSDev" name="dma11chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524356" name="Intel Corporation Xeon E5/Core i7 DMA Channel 4" pci_busid="0000:80:04.4" pci_type="0880 [8086:3c24] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 4"/>
+ <object type="OSDev" name="dma12chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524357" name="Intel Corporation Xeon E5/Core i7 DMA Channel 5" pci_busid="0000:80:04.5" pci_type="0880 [8086:3c25] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 5"/>
+ <object type="OSDev" name="dma13chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524358" name="Intel Corporation Xeon E5/Core i7 DMA Channel 6" pci_busid="0000:80:04.6" pci_type="0880 [8086:3c26] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 6"/>
+ <object type="OSDev" name="dma14chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524359" name="Intel Corporation Xeon E5/Core i7 DMA Channel 7" pci_busid="0000:80:04.7" pci_type="0880 [8086:3c27] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 DMA Channel 7"/>
+ <object type="OSDev" name="dma15chan0" osdev_type="4"/>
+ </object>
+ <object type="PCIDev" os_index="524368" name="Intel Corporation Xeon E5/Core i7 Address Map, VTd_Misc, System Management" pci_busid="0000:80:05.0" pci_type="0880 [8086:3c28] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 Address Map, VTd_Misc, System Management"/>
+ </object>
+ <object type="PCIDev" os_index="524370" name="Intel Corporation Xeon E5/Core i7 Control Status and Global Errors" pci_busid="0000:80:05.2" pci_type="0880 [8086:3c2a] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 Control Status and Global Errors"/>
+ </object>
+ <object type="PCIDev" os_index="524372" name="Intel Corporation Xeon E5/Core i7 I/O APIC" pci_busid="0000:80:05.4" pci_type="0800 [8086:3c2c] [00d9:0062] 07" pci_link_speed="0.000000">
+ <info name="PCIVendor" value="Intel Corporation"/>
+ <info name="PCIDevice" value="Xeon E5/Core i7 I/O APIC"/>
+ </object>
</object>
</object>
<object type="Bridge" os_index="1" bridge_type="0-1" depth="0" bridge_pci="0000:[7f-7f]">
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/utils/hwloc-info.1in b/src/pm/hydra/tools/topo/hwloc/hwloc/utils/hwloc-info.1in
index 9906e67..8bfe806 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/utils/hwloc-info.1in
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/utils/hwloc-info.1in
@@ -148,7 +148,7 @@ It is highly recommended that you read the hwloc(7) overview page
before reading this man page. Most of the concepts described in
hwloc(7) directly apply to the hwloc-calc utility.
.
-..\" **************************
+.\" **************************
.\" Examples Section
.\" **************************
.SH EXAMPLES
diff --git a/src/pm/hydra/tools/topo/hwloc/hwloc/utils/lstopo-draw.c b/src/pm/hydra/tools/topo/hwloc/hwloc/utils/lstopo-draw.c
index 1f39ea1..cc582c5 100644
--- a/src/pm/hydra/tools/topo/hwloc/hwloc/utils/lstopo-draw.c
+++ b/src/pm/hydra/tools/topo/hwloc/hwloc/utils/lstopo-draw.c
@@ -261,8 +261,8 @@ RECURSE_BEGIN(obj, border) \
} else { \
unsigned found = 0; \
/* Try to find a fitting rectangle */ \
- for (rows = (unsigned) floor(sqrt(numsubobjs)); \
- rows >= (unsigned) ceil(pow(numsubobjs,0.33)) && rows > 1; \
+ for (rows = (unsigned) (float) floor(sqrt(numsubobjs)); \
+ rows >= (unsigned) (float) ceil(pow(numsubobjs,0.33)) && rows > 1; \
rows--) { \
columns = numsubobjs / rows; \
if (columns > 1 && columns * rows == numsubobjs) { \
-----------------------------------------------------------------------
Summary of changes:
src/pm/hydra/tools/topo/hwloc/hwloc/NEWS | 32 +
src/pm/hydra/tools/topo/hwloc/hwloc/VERSION | 6 +-
.../hydra/tools/topo/hwloc/hwloc/config/hwloc.m4 | 101 +++-
src/pm/hydra/tools/topo/hwloc/hwloc/configure.ac | 20 +-
src/pm/hydra/tools/topo/hwloc/hwloc/doc/hwloc.doxy | 36 +-
.../topo/hwloc/hwloc/include/hwloc/glibc-sched.h | 6 +-
.../tools/topo/hwloc/hwloc/include/hwloc/helper.h | 44 +-
.../tools/topo/hwloc/hwloc/include/hwloc/rename.h | 4 +-
.../tools/topo/hwloc/hwloc/include/private/misc.h | 7 +-
.../hydra/tools/topo/hwloc/hwloc/src/Makefile.am | 4 -
src/pm/hydra/tools/topo/hwloc/hwloc/src/bitmap.c | 2 +
.../hydra/tools/topo/hwloc/hwloc/src/distances.c | 15 +-
.../tools/topo/hwloc/hwloc/src/topology-freebsd.c | 36 +-
.../hydra/tools/topo/hwloc/hwloc/src/topology-gl.c | 9 +-
.../tools/topo/hwloc/hwloc/src/topology-pci.c | 49 ++-
.../tools/topo/hwloc/hwloc/src/topology-x86.c | 18 +-
src/pm/hydra/tools/topo/hwloc/hwloc/src/topology.c | 37 +-
.../hwloc/tests/xml/32em64t-2n8c2t-pci-noio.xml | 288 +++++-----
.../tests/xml/32em64t-2n8c2t-pci-normalio.xml | 384 ++++++------
.../hwloc/tests/xml/32em64t-2n8c2t-pci-wholeio.xml | 628 ++++++++++----------
.../tools/topo/hwloc/hwloc/utils/hwloc-info.1in | 2 +-
.../tools/topo/hwloc/hwloc/utils/lstopo-draw.c | 4 +-
22 files changed, 960 insertions(+), 772 deletions(-)
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