[mpich-discuss] MPI process binding on SunOS systems

[Aurélien Larcher]

Hi Rajeev,
thank you for the pointer, actually this page leads me to another question.
What is exactly the policy for binding by hwthreads ?

I can see that:

larcher at na75:> HYDRA_TOPO_DEBUG=1  mpiexec -n 8 -bind-to hwthread /bin/true
| sort
process 0 binding: 1 0 0 0 0 0 0 0
process 1 binding: 0 0 0 0 1 0 0 0
process 2 binding: 0 1 0 0 0 0 0 0
process 3 binding: 0 0 0 0 0 1 0 0
process 4 binding: 0 0 1 0 0 0 0 0
process 5 binding: 0 0 0 0 0 0 1 0
process 6 binding: 0 0 0 1 0 0 0 0
process 7 binding: 0 0 0 0 0 0 0 1

Which seems unfortunate because since the processor is a quad core with
hyperthreading the same physical core will get the first two threads.

larcher at na75:> psrinfo -pv
The physical processor has 4 cores and 8 virtual processors (0-7)
  The core has 2 virtual processors (0 4)
  The core has 2 virtual processors (1 5)
  The core has 2 virtual processors (2 6)
  The core has 2 virtual processors (3 7)
    x86 (GenuineIntel 206A7 family 6 model 42 step 7 clock 3392 MHz)
      Intel(r) Core(tm) i7-2600 CPU @ 3.40GHz


This is confirmed by:

HYDRA_TOPO_DEBUG=1  mpiexec -n 4 -bind-to hwthread /bin/true | sort
process 0 binding: 1 0 0 0 0 0 0 0
process 1 binding: 0 0 0 0 1 0 0 0
process 2 binding: 0 1 0 0 0 0 0 0
process 3 binding: 0 0 0 0 0 1 0 0

Is it due to a Linux-specific numbering of logical cores ?

Thank you,

Aurelien




On Wed, Apr 1, 2015 at 6:18 PM, Thakur, Rajeev <thakur at mcs.anl.gov> wrote:

> Yes, see
> https://wiki.mpich.org/mpich/index.php/Using_the_Hydra_Process_Manager#Process-core_Binding
>
> Rajeev
>
>
> On Apr 1, 2015, at 11:14 AM, Aurélien Larcher <aurelien.larcher at gmail.com>
>  wrote:
>
> > Hi,
> > running parallel code on my workstation (with OpenIndiana) I discovered
> that MPI processes were migrated on a regular basis from one core to
> another.
> >
> > On SunOS systems the command 'pbind' allows binding a process to a
> specific core.
> > So I am wondering if binding automatically each process to the next
> available core is supported directly from MPICH ?
> >
> > Best regards
> >
> > Aurelien
> >
> > --
> >
> -------------------------------------------------------------------------------
> > LARCHER Aurélien          | KTH, School of Computer Science and
> Communication
> > Work: +46 (0) 8 790 71 42 | Lindstedtsvägen 5, Plan 4, 100 44
> Stockholm, SWEDEN
> >
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LARCHER Aurélien          | KTH, School of Computer Science and
Communication
Work: +46 (0) 8 790 71 42 | Lindstedtsvägen 5, Plan 4, 100 44 Stockholm,
SWEDEN
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